On Tue, Oct 20, 2009 at 9:43 AM, Hugh Greenberg <[email protected]> wrote:
> I forgot to mention that if I took one of the cpus out, coreboot wouldn't
> start at all. If I put that one back in and took the other out, I got the
> same output as before.
Strange.
Could you try this patch so we can see what APIC it's trying to read?
Thanks,
Myles
Index: cbv2/src/cpu/amd/model_fxx/init_cpus.c
===================================================================
--- cbv2.orig/src/cpu/amd/model_fxx/init_cpus.c
+++ cbv2/src/cpu/amd/model_fxx/init_cpus.c
@@ -278,6 +278,8 @@ static unsigned init_cpus(unsigned cpu_i
#if (CONFIG_ENABLE_APIC_EXT_ID == 1)
unsigned initial_apicid = get_initial_apicid();
+ print_initcpu8("initial apic id ", initial_apicid);
+ print_initcpu8("initial bsp_apicid ", initial_apicid);
#if CONFIG_LIFT_BSP_APIC_ID == 0
if( initial_apicid != 0 ) // other than bsp
#endif
@@ -292,12 +294,14 @@ static unsigned init_cpus(unsigned cpu_i
#if CONFIG_LIFT_BSP_APIC_ID == 1
bsp_apicid += CONFIG_APIC_ID_OFFSET;
+ print_initcpu8("bsp_apicid ", initial_apicid);
#endif
#endif
/* get the apicid, it may be lifted already */
apicid = lapicid();
+ print_initcpu8("lapic apic id ", apicid);
#if 0
// show our apicid, nodeid, and coreid
@@ -343,6 +347,7 @@ static unsigned init_cpus(unsigned cpu_i
}
if(timeout) {
print_initcpu8("while waiting for BSP signal to STOP, timeout in ap ", apicid);
+ print_initcpu8("BSP apic id ", bsp_apicid);
}
lapic_write(LAPIC_MSG_REG, (apicid<<24) | 0x44); // bsp can not check it before stop_this_cpu
set_init_ram_access();
--
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