Hi all,
I did a fresh svn co the other day and tried building and
running a Tyan S2912_fam10 system. With older sources
(rev 4729) everything worked just fine, with the newest checkout
the booting process stops at setting MTRR registers or a little
later (depending on the compiler used: 3.4.6 builds faster code
and gets further than 4.3.3, both Ubuntu fashion).
I tried tracking down the problem and it appeared to me as if
the switch from CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP
must have something to do with this though I couldnt find an
error when comparing all the files affected by this switch.
Attached are the last lines of the debug printout.
Does anyone have an idea, where this error might come from
or if there are any unintended side effects associated with this change?
Thanks in advance,
Maximilian
--
Maximilian Thuermer
University of Heidelberg
Zentrales Institut für Technische Informatik (ziti)
Computer Architecture Group
B 6, 26, 68131 Mannheim
http://ra.ziti.uni-heidelberg.de
email: [email protected]
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
start_eip=0x0000d000, offset=0x00100000, code_size=0x0000005b
Initializing CPU #0
CPU: vendor AMD device 100f42
CPU: family 10, model 04, stepping 02
nodeid = 00, coreid = 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic... apic_id: 0x00 done.
CPU model: AMD Thermal Test Kit
siblings = 03, CPU #0 initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor AMD device 100f42
CPU: family 10, model 04, stepping 02
nodeid = 00, coreid = 01
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic... apic_id: 0x01 done.
CPU model: AMD Thermal Test Kit
siblings = 03, CPU #1 initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor AMD device 100f42
CPU: family 10, model 04, stepping 02
nodeid = 00, coreid = 02
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic... apic_id: 0x02 done.
CPU model: AMD Thermal Test Kit
siblings = 03, CPU #2 initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
CPU: vendor AMD device 100f42
CPU: family 10, model 04, stepping 02
nodeid = 00, coreid = 03
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic... apic_id: 0x03 done.
CPU model: AMD Thermal Test Kit
siblings = 03, CPU #3 initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 4.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 4.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #4
CPU: vendor AMD device 100f42
CPU: family 10, model 04, stepping 02
nodeid = 01, coreid = 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
ADDRESS_MASK_HIGH=0xffff
Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Setting up local apic... apic_id: 0x04 done.
CPU model: AMD Thermal Test Kit
siblings = 03, CPU #4 initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 5.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 5.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #5
CPU: vendor AMD device 100f42
CPU: family 10, model 04, stepping 02
nodeid = 01, coreid = 01
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-88) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-88) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(0-88) Type: WB, RdMEM, WrMEM
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