> Hi, Myles, > About the HT code, I have a question. > > I am debugging my board, which is Fam10+RS780+SB700. The CPU and RS780 are > the two HT node. Aren't there three? How is the SB700 connected to the RS780?
> It seems like the RS690/SB600 board. The RS690/SB600 board has three. > In early_ht.c, the > comment in enumertate_ht_chain() says, > #if CONFIG_HT_CHAIN_UNITID_BASE != 0 > /* CONFIG_HT_CHAIN_UNITID_BASE could be 0 (only one ht device in the ht > chain), > if so, don't need to go through the chain */ > > I am wondering if the CONFIG_HT_CHAIN_UNITID_BASE is 0 in my case. If not, > why in the supported RS690/SB600 board, the CONFIG_HT_CHAIN_UNITID_BASE is > 0. Good question. How does it end up being enumerated? Does the lspci end up how you would expect/like on your board? Part of the confusing part to me is that there are three enumerations that can happen: early_ht.c: Just enumerate the southbridge chain in case that's needed for serial initialization or ROM access. incoherent_ht.c: Enumerate all chains so that they can be optimized before the first reset. hypertransport.c: Enumerate the chains according to the device tree. Thanks, Myles -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
