Hi,
attached patch implements a framework to do rom enable sequences for the
tinybootblock system and implements the rom enable for Fam10.
Changes:
- Pass BIST through the bootblock (AMD wants this)
- Rework walkcbfs to leave two registers unused, so BIST doesn't break
romcc on non-mmx/sse systems
- Provide enable_rom code for Fam10 northbridge and AMD8111 southbridge
and hook it up in amd/serengeti_cheetah_fam10
Build tested on amd/serengeti_cheetah_fam10 and emulation/qemu-x86. QEmu
is also boot-tested, the AMD board failed in my last tests. As I'm out
of ideas on what might be wrong in Fam10 init, I decided to publish it -
it's an improvement over what we have now, right? ;-)
Signed-off-by: Patrick Georgi <[email protected]>
Regards,
Patrick
Index: src/southbridge/amd/amd8111/Kconfig
===================================================================
--- src/southbridge/amd/amd8111/Kconfig (Revision 4993)
+++ src/southbridge/amd/amd8111/Kconfig (Arbeitskopie)
@@ -19,4 +19,9 @@
config SOUTHBRIDGE_AMD_AMD8111
bool
+ select BOOTBLOCK_SOUTHBRIDGE_USE_INIT
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+ string
+ default "southbridge/amd/amd8111/bootblock.c"
+ depends on SOUTHBRIDGE_AMD_AMD8111
Index: src/southbridge/amd/amd8111/bootblock.c
===================================================================
--- src/southbridge/amd/amd8111/bootblock.c (Revision 0)
+++ src/southbridge/amd/amd8111/bootblock.c (Revision 0)
@@ -0,0 +1,6 @@
+#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
+
+static void bootblock_southbridge_init(void) {
+ /* Setup the rom access for 4M */
+ amd8111_enable_rom();
+}
Index: src/cpu/amd/model_fxx/Kconfig
===================================================================
--- src/cpu/amd/model_fxx/Kconfig (Revision 4993)
+++ src/cpu/amd/model_fxx/Kconfig (Arbeitskopie)
@@ -3,6 +3,7 @@
select HAVE_MOVNTI
select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
+ select SSE
config CPU_ADDR_BITS
int
Index: src/cpu/amd/model_10xxx/Kconfig
===================================================================
--- src/cpu/amd/model_10xxx/Kconfig (Revision 4993)
+++ src/cpu/amd/model_10xxx/Kconfig (Arbeitskopie)
@@ -3,6 +3,7 @@
select HAVE_MOVNTI
select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
+ select SSE
config CPU_ADDR_BITS
int
Index: src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
===================================================================
--- src/mainboard/amd/serengeti_cheetah_fam10/Kconfig (Revision 4993)
+++ src/mainboard/amd/serengeti_cheetah_fam10/Kconfig (Arbeitskopie)
@@ -20,6 +20,7 @@
select BOARD_ROMSIZE_KB_1024
select ENABLE_APIC_EXT_ID
select LIFT_BSP_APIC_ID
+ select TINY_BOOTBLOCK
config MAINBOARD_DIR
string
@@ -127,3 +128,12 @@
default 0x1022
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+config RAMBASE
+ hex
+ default 0x200000
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
+config ID_SECTION_OFFSET
+ hex
+ default 0x80
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
Index: src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
===================================================================
--- src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc (Revision 4993)
+++ src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc (Arbeitskopie)
@@ -41,17 +41,12 @@
initobj-y += crt0.o
# FIXME in $(top)/Makefile
-crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
-crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
-crt0-y += ../../../../src/arch/i386/lib/id.inc
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
crt0-y += auto.inc
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
-ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
-ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
-ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/cpu/x86/32bit/entry32.lds
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
Index: src/northbridge/amd/amdfam10/Kconfig
===================================================================
--- src/northbridge/amd/amdfam10/Kconfig (Revision 4993)
+++ src/northbridge/amd/amdfam10/Kconfig (Arbeitskopie)
@@ -21,6 +21,7 @@
bool
select HAVE_HIGH_TABLES
select HYPERTRANSPORT_PLUGIN_SUPPORT
+ select BOOTBLOCK_NORTHBRIDGE_USE_INIT
config AGP_APERTURE_SIZE
hex
@@ -52,4 +53,9 @@
default n
depends on NORTHBRIDGE_AMD_AMDFAM10
+config BOOTBLOCK_NORTHBRIDGE_INIT
+ string
+ default "northbridge/amd/amdfam10/bootblock.c"
+ depends on NORTHBRIDGE_AMD_AMDFAM10
+
source src/northbridge/amd/amdfam10/root_complex/Kconfig
Index: src/northbridge/amd/amdfam10/Makefile.inc
===================================================================
--- src/northbridge/amd/amdfam10/Makefile.inc (Revision 4993)
+++ src/northbridge/amd/amdfam10/Makefile.inc (Arbeitskopie)
@@ -13,33 +13,33 @@
ifdef POST_EVALUATION
$(obj)/northbridge/amd/amdfam10/ssdt.c:
$(src)/northbridge/amd/amdfam10/ssdt.dsl
- iasl -p $(CURDIR)/ssdt -tc $<
- perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt.hex
- mv ssdt.hex $@
+ iasl -p $(obj)/ssdt -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_ssdt/g' $(obj)/ssdt.hex
+ mv $(obj)/ssdt.hex $@
$(obj)/northbridge/amd/amdfam10/sspr1.c:
$(src)/northbridge/amd/amdfam10/sspr1.dsl
- iasl -p $(CURDIR)/sspr1 -tc $<
- perl -pi -e 's/AmlCode/AmlCode_sspr1/g' sspr1.hex
- mv sspr1.hex $@
+ iasl -p $(obj)/sspr1 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr1/g' $(obj)/sspr1.hex
+ mv $(obj)/sspr1.hex $@
$(obj)/northbridge/amd/amdfam10/sspr2.c:
$(src)/northbridge/amd/amdfam10/sspr2.dsl
- iasl -p $(CURDIR)/sspr2 -tc $<
- perl -pi -e 's/AmlCode/AmlCode_sspr2/g' sspr2.hex
- mv sspr2.hex $@
+ iasl -p $(obj)/sspr2 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr2/g' $(obj)/sspr2.hex
+ mv $(obj)/sspr2.hex $@
$(obj)/northbridge/amd/amdfam10/sspr3.c:
$(src)/northbridge/amd/amdfam10/sspr3.dsl
- iasl -p $(CURDIR)/sspr3 -tc $<
- perl -pi -e 's/AmlCode/AmlCode_sspr3/g' sspr3.hex
- mv sspr3.hex $@
+ iasl -p $(obj)/sspr3 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr3/g' $(obj)/sspr3.hex
+ mv $(obj)/sspr3.hex $@
$(obj)/northbridge/amd/amdfam10/sspr4.c:
$(src)/northbridge/amd/amdfam10/sspr4.dsl
- iasl -p $(CURDIR)/sspr4 -tc $<
- perl -pi -e 's/AmlCode/AmlCode_sspr4/g' sspr4.hex
- mv sspr4.hex $@
+ iasl -p $(obj)/sspr4 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr4/g' $(obj)/sspr4.hex
+ mv $(obj)/sspr4.hex $@
$(obj)/northbridge/amd/amdfam10/sspr5.c:
$(src)/northbridge/amd/amdfam10/sspr5.dsl
- iasl -p $(CURDIR)/sspr5 -tc $<
- perl -pi -e 's/AmlCode/AmlCode_sspr5/g' sspr5.hex
- mv sspr5.hex $@
+ iasl -p $(obj)/sspr5 -tc $<
+ perl -pi -e 's/AmlCode/AmlCode_sspr5/g' $(obj)/sspr5.hex
+ mv $(obj)/sspr5.hex $@
endif
Index: src/northbridge/amd/amdfam10/bootblock.c
===================================================================
--- src/northbridge/amd/amdfam10/bootblock.c (Revision 0)
+++ src/northbridge/amd/amdfam10/bootblock.c (Revision 0)
@@ -0,0 +1,12 @@
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_def.h>
+#include "northbridge/amd/amdfam10/early_ht.c"
+
+static void bootblock_northbridge_init(void) {
+ /* Nothing special needs to be done to find bus 0 */
+ /* Allow the HT devices to be found */
+ /* mov bsp to bus 0xff when > 8 nodes */
+ set_bsp_node_CHtExtNodeCfgEn();
+ enumerate_ht_chain();
+}
Index: src/arch/i386/Kconfig
===================================================================
--- src/arch/i386/Kconfig (Revision 4993)
+++ src/arch/i386/Kconfig (Arbeitskopie)
@@ -43,3 +43,17 @@
config TINY_BOOTBLOCK
bool
default n
+
+config BOOTBLOCK_NORTHBRIDGE_USE_INIT
+ bool
+ default n
+
+config BOOTBLOCK_SOUTHBRIDGE_USE_INIT
+ bool
+ default n
+
+config BOOTBLOCK_NORTHBRIDGE_INIT
+ string
+
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+ string
Index: src/arch/i386/init/bootblock.c
===================================================================
--- src/arch/i386/init/bootblock.c (Revision 4993)
+++ src/arch/i386/init/bootblock.c (Arbeitskopie)
@@ -1,3 +1,23 @@
+#if CONFIG_LOGICAL_CPUS && \
+ (CONFIG_BOOTBLOCK_NORTHBRIDGE_USE_INIT ||
CONFIG_BOOTBLOCK_SOUTHBRIDGE_USE_INIT)
+#include <cpu/x86/lapic/boot_cpu.c>
+#else
+#define boot_cpu(x) 1
+#endif
+
+#if !CONFIG_BOOTBLOCK_NORTHBRIDGE_USE_INIT
+#undef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
+#define CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT "arch/i386/init/bootblock_dummy.c"
+#endif
+
+#if !CONFIG_BOOTBLOCK_SOUTHBRIDGE_USE_INIT
+#undef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
+#define CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT "arch/i386/init/bootblock_dummy.c"
+#endif
+
+#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
+#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
+
static unsigned long findstage(char* target)
{
unsigned long entry;
@@ -4,21 +24,25 @@
asm volatile (
"mov $1f, %%esp\n\t"
"jmp walkcbfs\n\t"
- "1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edx",
"edi", "ebp", "esp");
+ "1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edi",
"esp");
return entry;
}
-static void call(unsigned long addr)
+static void call(unsigned long addr, unsigned long bist)
{
- asm volatile ("jmp %0\n\t" : : "r" (addr));
+ asm volatile ("jmp %0\n\t" : : "r" (addr), "a" (bist));
}
-static void main(void)
+static void main(unsigned long bist)
{
+ if (boot_cpu()) {
+ bootblock_northbridge_init();
+ bootblock_southbridge_init();
+ }
const char* target1 = "fallback/romstage";
unsigned long entry;
entry = findstage(target1);
- if (entry) call(entry);
+ if (entry) call(entry, bist);
asm volatile ("1:\n\thlt\n\tjmp 1b\n\t");
}
Index: src/arch/i386/init/bootblock_dummy.c
===================================================================
--- src/arch/i386/init/bootblock_dummy.c (Revision 0)
+++ src/arch/i386/init/bootblock_dummy.c (Revision 0)
@@ -0,0 +1,7 @@
+#ifndef BOOTBLOCK_DUMMY
+#define BOOTBLOCK_DUMMY
+static void bootblock_northbridge_init(void) {
+}
+static void bootblock_southbridge_init(void) {
+}
+#endif
Index: src/arch/i386/lib/walkcbfs.S
===================================================================
--- src/arch/i386/lib/walkcbfs.S (Revision 4993)
+++ src/arch/i386/lib/walkcbfs.S (Arbeitskopie)
@@ -25,18 +25,9 @@
input %esi: filename
input %esp: return address (not pointer to return address!)
output %eax: entry point
- clobbers %ebx, %ecx, %edx, %edi, %ebp
+ clobbers %ebx, %ecx, %edi
*/
walkcbfs:
- mov %esi, %ebp /* stash away filename pointer */
- mov $0, %edx
-1:
- cmpb $0, (%edx,%esi)
- jz 2f
- add $1, %edx
- jmp 1b
-2:
- add $1, %edx
mov CBFS_HEADER_PTR, %eax
mov CBFS_HEADER_ROMSIZE(%eax), %ecx
bswap %ecx
@@ -45,15 +36,20 @@
mov CBFS_HEADER_OFFSET(%eax), %ecx
bswap %ecx
add %ecx, %ebx
- mov CBFS_HEADER_ALIGN(%eax), %eax
- bswap %eax
- sub $1, %eax
+ /* determine filename length */
+ mov $0, %eax
+1:
+ cmpb $0, (%eax,%esi)
+ jz 2f
+ add $1, %eax
+ jmp 1b
+2:
+ add $1, %eax
walker:
- mov %ebp, %esi
mov %ebx, %edi
add $CBFS_FILE_STRUCTSIZE, %edi /* edi = address of first byte after
struct cbfs_file */
- mov %edx, %ecx
+ mov %eax, %ecx
repe cmpsb
# zero flag set if strings are equal
jnz tryharder
@@ -67,21 +63,29 @@
jmp *%esp
tryharder:
+ sub %ebx, %edi /* edi = # of walked bytes */
+ sub %edi, %esi /* esi = start of filename */
+
+ /* ebx = ecx = (current+offset+len+ALIGN-1) & ~(ALIGN-1) */
mov CBFS_FILE_OFFSET(%ebx), %ecx
bswap %ecx
add %ebx, %ecx
mov CBFS_FILE_LEN(%ebx), %edi
bswap %edi
add %edi, %ecx
- add %eax, %ecx
- mov %eax, %edi
+ mov CBFS_HEADER_PTR, %ebx
+ mov CBFS_HEADER_ALIGN(%ebx), %ebx
+ bswap %ebx
+ sub $1, %ebx
+ add %ebx, %ecx
+ mov %ebx, %edi
not %edi
and %edi, %ecx
mov %ecx, %ebx
/* look if we should exit */
- mov CBFS_HEADER_PTR, %esi
- mov CBFS_HEADER_ROMSIZE(%esi), %ecx
+ mov CBFS_HEADER_PTR, %ecx
+ mov CBFS_HEADER_ROMSIZE(%ecx), %ecx
bswap %ecx
not %ecx
add $1, %ecx
Index: src/arch/i386/Makefile.tinybootblock.inc
===================================================================
--- src/arch/i386/Makefile.tinybootblock.inc (Revision 4993)
+++ src/arch/i386/Makefile.tinybootblock.inc (Arbeitskopie)
@@ -30,9 +30,17 @@
bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
bootblock_inc += $(src)/arch/i386/lib/id.inc
+ifeq ($(CONFIG_SSE),y)
+bootblock_inc += $(src)/cpu/x86/sse_enable.inc
+endif
bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
bootblock_inc += $(src)/arch/i386/lib/walkcbfs.S
+bootblock_romccflags := -mcpu=i386
+ifeq ($(CONFIG_SSE),y)
+bootblock_romccflags := -mcpu=k7 -msse
+endif
+
$(obj)/bootblock/ldscript.ld: $(bootblock_ldscripts) $(obj)/ldoptions
mkdir -p $(obj)/bootblock
printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE
"$(ldscript)"\n)' > $@
@@ -48,7 +56,7 @@
$(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include
-I$(src)/arch/i386/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h
-I. -I$(src) $< > [email protected] && mv [email protected] $@
$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(obj)/romcc
$(src)/arch/i386/init/bootblock.c
- $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES)
$(src)/arch/i386/init/bootblock.c -o $@
+ $(obj)/romcc $(bootblock_romccflags) -O2 $(ROMCCFLAGS) $(INCLUDES)
$(src)/arch/i386/init/bootblock.c -o $@
$(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o
$(obj)/bootblock/ldscript.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
Index: util/compareboard/compareboard
===================================================================
--- util/compareboard/compareboard (Revision 4993)
+++ util/compareboard/compareboard (Arbeitskopie)
@@ -103,8 +103,14 @@
-e "/^CONFIG_GDB_STUB / d" \
-e "/^CONFIG_VIDEO_MB / d" \
-e "/^CONFIG_EXPERT / d" \
+ -e "/^CONFIG_SSE / d" \
-e "/^CONFIG_VGA_BIOS / d" \
-e "/^CONFIG_WARNINGS_ARE_ERRORS / d" \
+ -e "/^CONFIG_TINY_BOOTBLOCK / d" \
+ -e "/^CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT / d" \
+ -e "/^CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT / d" \
+ -e "/^CONFIG_BOOTBLOCK_NORTHBRIDGE_USE_INIT / d" \
+ -e "/^CONFIG_BOOTBLOCK_SOUTHBRIDGE_USE_INIT / d" \
$A/new > $A/new.filtered
normalize $A/old.filtered > $A/old.normalized
Index: util/romcc/romcc.c
===================================================================
--- util/romcc/romcc.c (Revision 4993)
+++ util/romcc/romcc.c (Arbeitskopie)
@@ -3616,6 +3616,7 @@
tm = localtime(&now);
register_builtin_macro(state, "__ROMCC__", VERSION_MAJOR);
+ register_builtin_macro(state, "__PRE_RAM__", VERSION_MAJOR);
register_builtin_macro(state, "__ROMCC_MINOR__", VERSION_MINOR);
register_builtin_macro(state, "__FILE__", "\"This should be the
filename\"");
register_builtin_macro(state, "__LINE__", "54321");
--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot
