Dear Piotr,
Your SPD rom can not be read correctly, hence your RAM controller is
not set up correctly...
Stefan
On 07.01.2010, at 14:22, Piotr Piwko <[email protected]> wrote:
Hello,
I am preparing the coreboot version for MSM800BEV board from Digital
Logic. This is the same branch as MSM800SEV board so, I've decided
that is a good starting point.
So, I built and loaded it to my flash memory and finally run.
Unfortunately, it stops at "Uncompressing coreboot to ram" message.
I've found that it hangs on calling the 'cbfs_and_run_core' function
which is in 'cpu/amd/model_lx/cache_as_ram.inc' file.
Is it a known issue? Maybe you can give my any hints to fix this
situation?
Thank you in advance for your engagement.
PS. I have attached the log from my serial port
--
Piotr Piwko
http://www.embedded-engineering.pl/
<msm800bev_log.txt>
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