Am 09.01.2010 23:31, schrieb Kevin O'Connor: > This is just a starting point for discussion. There's a good chance > I've gotten some things wrong. The idea is to document where things > are heading instead of how exactly they are today. > Thank you! > * Full rom mapping and fallback/normal switch can be board specific, > but most of the other code is standard. > Any romstage selection should be generic in source (it can compile to board specific object code). The proliferation of all those similar-but-not-quite copies of the switch in the board directories wasn't one of the better aspects of coreboot-v2.
The current "selection" code for tinybootblock is in src/arch/i386/init/bootblock.c At some point I'd like to see multiple selection code files there with a Kconfig option to select the desired one. Before we can actually do a selection, we need a way to fill an image with mupltiple variants. That's mostly a build system issue, but one I'd like to get ridhg > Open questions: > > At what point do the non-BP cpus get shutdown? What phases will use > multiple processors? > CPU code (or northbridge code in some instances, I think) handles that for itself. AMD can (or must?) use multiple CPUs for RAM init, all others put non-BP cpus to sleep as soon as possible (somewhere inside cpu or northbridge code). > How is S3 resume handled? > Rudolf was working on resume related issues recently. A clear set of rules how caches have to work in all stages should help him, too... Patrick -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
