Author: stepan
Date: Thu Feb  4 12:05:59 2010
New Revision: 5085
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5085

Log:
typo
Signed-off-by: Stefan Reinauer <[email protected]>
Acked-by: Stefan Reinauer <[email protected]>

Modified:
   trunk/src/cpu/intel/slot_2/Kconfig

Modified: trunk/src/cpu/intel/slot_2/Kconfig
==============================================================================
--- trunk/src/cpu/intel/slot_2/Kconfig  Thu Feb  4 11:28:16 2010        (r5084)
+++ trunk/src/cpu/intel/slot_2/Kconfig  Thu Feb  4 12:05:59 2010        (r5085)
@@ -29,5 +29,5 @@
 config DCACHE_RAM_SIZE
        hex
        default 0x01000
-       depends on CPU_INTEL_SLOT2
+       depends on CPU_INTEL_SLOT_2
 

-- 
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot

Reply via email to