Author: uwe Date: Sun Feb 14 17:13:03 2010 New Revision: 5125 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5125
Log: Add w83627hf_set_clksel_48() function which sets CLKSEL to 48MHz. The Win Ent platforms are using the Winbond W83627HG part, but this part does not appear to enable 48MHz clock by default as claimed in the datasheet. Signed-off-by: Anish K Patel <[email protected]> Acked-by: Uwe Hermann <[email protected]> Modified: trunk/src/superio/winbond/w83627hf/w83627hf_early_serial.c Modified: trunk/src/superio/winbond/w83627hf/w83627hf_early_serial.c ============================================================================== --- trunk/src/superio/winbond/w83627hf/w83627hf_early_serial.c Sat Feb 13 19:06:29 2010 (r5124) +++ trunk/src/superio/winbond/w83627hf/w83627hf_early_serial.c Sun Feb 14 17:13:03 2010 (r5125) @@ -45,3 +45,13 @@ pnp_set_enable(dev, 1); pnp_exit_ext_func_mode(dev); } + +static void w83627hf_set_clksel_48(device_t dev) +{ + unsigned port = dev >> 8; + pnp_enter_ext_func_mode(dev); + outb(0x24, port); + /* Set CLKSEL (clock input on pin 1) to 48MHz. */ + outb(inb(port + 1) | (1 << 6), port + 1); + pnp_exit_ext_func_mode(dev); +} -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
