Author: stepan Date: Tue Feb 16 01:06:42 2010 New Revision: 5130 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5130
Log: fix APCI typos. Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/arch/i386/include/arch/acpi.h trunk/src/northbridge/amd/amdht/AsPsDefs.h Modified: trunk/src/arch/i386/include/arch/acpi.h ============================================================================== --- trunk/src/arch/i386/include/arch/acpi.h Tue Feb 16 00:27:48 2010 (r5129) +++ trunk/src/arch/i386/include/arch/acpi.h Tue Feb 16 01:06:42 2010 (r5130) @@ -42,7 +42,7 @@ char signature[8]; /* RSDP signature "RSD PTR" */ u8 checksum; /* checksum of the first 20 bytes */ char oem_id[6]; /* OEM ID, "LXBIOS" */ - u8 revision; /* 0 for APCI 1.0, 2 for ACPI 2.0/3.0 */ + u8 revision; /* 0 for ACPI 1.0, 2 for ACPI 2.0/3.0 */ u32 rsdt_address; /* physical address of RSDT */ u32 length; /* total length of RSDP (including extended part) */ u64 xsdt_address; /* physical address of XSDT */ Modified: trunk/src/northbridge/amd/amdht/AsPsDefs.h ============================================================================== --- trunk/src/northbridge/amd/amdht/AsPsDefs.h Tue Feb 16 00:27:48 2010 (r5129) +++ trunk/src/northbridge/amd/amdht/AsPsDefs.h Tue Feb 16 01:06:42 2010 (r5130) @@ -82,7 +82,7 @@ #define PCI_DEV_BASE 24 /* System PCI device ID base */ -#define LOCAL_APIC_ID_SHIFT 24 /* Local APCI ID shift bit # */ +#define LOCAL_APIC_ID_SHIFT 24 /* Local APIC ID shift bit # */ #define APIC_CID_SIZE_SHIFT 12 /* ApicCoreIdSize shift bit # */ #define FN_0 0 /* Function 0 */ #define FN_1 1 /* Function 1 */ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
