Author: stepan Date: Thu Feb 25 14:40:49 2010 New Revision: 5159 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5159
Log: HAVE_MOVNTI really means SSE2. Also add sfence in the MOVNTI case. Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Patrick Georgi <[email protected]> Modified: trunk/src/Kconfig trunk/src/cpu/Kconfig trunk/src/cpu/amd/model_10xxx/Kconfig trunk/src/cpu/amd/model_fxx/Kconfig trunk/src/cpu/intel/model_1067x/Kconfig trunk/src/cpu/intel/model_106cx/Kconfig trunk/src/cpu/intel/model_6ex/Kconfig trunk/src/cpu/intel/model_6fx/Kconfig trunk/src/cpu/intel/model_f0x/Kconfig trunk/src/cpu/intel/model_f1x/Kconfig trunk/src/cpu/intel/model_f2x/Kconfig trunk/src/cpu/intel/model_f3x/Kconfig trunk/src/cpu/intel/model_f4x/Kconfig trunk/src/cpu/via/model_c7/Kconfig trunk/src/lib/ramtest.c Modified: trunk/src/Kconfig ============================================================================== --- trunk/src/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -184,10 +184,6 @@ bool default n -config HAVE_MOVNTI - bool - default n - config HAVE_OPTION_TABLE bool default y Modified: trunk/src/cpu/Kconfig ============================================================================== --- trunk/src/cpu/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -32,14 +32,26 @@ This option is used to enable certain functions to make coreboot work correctly on symmetric multi processor (SMP) systems. -# Set MMX and SSE in socket or model if the CPU has them. -# If all CPUs for the socket have MMX or SSE, set them there. -# These options are only needed for boards compiled with romcc. config MMX bool + help + Select MMX in your socket or model Kconfig if your CPU has MMX + streaming SIMD instructions. ROMCC can build more efficient + code if it can spill to MMX registers. config SSE bool + help + Select SSE in your socket or model Kconfig if your CPU has SSE + streaming SIMD instructions. ROMCC can build more efficient + code if it can spill to SSE (aka XMM) registers. + +config SSE2 + bool + help + Select SSE2 in your socket or model Kconfig if your CPU has SSE2 + streaming SIMD instructions. Some parts of coreboot can be built + with more efficient code if SSE2 instructions are available. config VAR_MTRR_HOLE bool Modified: trunk/src/cpu/amd/model_10xxx/Kconfig ============================================================================== --- trunk/src/cpu/amd/model_10xxx/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/amd/model_10xxx/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,9 +1,9 @@ config CPU_AMD_MODEL_10XXX bool - select HAVE_MOVNTI select USE_PRINTK_IN_CAR select USE_DCACHE_RAM select SSE + select SSE2 select HAVE_INIT_TIMER config CPU_ADDR_BITS Modified: trunk/src/cpu/amd/model_fxx/Kconfig ============================================================================== --- trunk/src/cpu/amd/model_fxx/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/amd/model_fxx/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,9 +1,10 @@ config CPU_AMD_MODEL_FXX bool - select HAVE_MOVNTI select USE_PRINTK_IN_CAR select USE_DCACHE_RAM + select MMX select SSE + select SSE2 select HAVE_INIT_TIMER config CPU_ADDR_BITS Modified: trunk/src/cpu/intel/model_1067x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_1067x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_1067x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_CORE2 bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_106cx/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_106cx/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_106cx/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_ATOM_230 bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_6ex/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_6ex/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_6ex/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_CORE bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_6fx/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_6fx/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_6fx/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1 +1,4 @@ -# select HAVE_MOVNTI +config CPU_INTEL_CORE2 + bool + select SMP + select SSE2 Modified: trunk/src/cpu/intel/model_f0x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f0x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f0x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F0X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_f1x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f1x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f1x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F1X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_f2x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f2x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f2x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F2X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_f3x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f3x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f3x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F3X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/intel/model_f4x/Kconfig ============================================================================== --- trunk/src/cpu/intel/model_f4x/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/intel/model_f4x/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,4 +1,4 @@ config CPU_INTEL_MODEL_F4X bool select SMP - select HAVE_MOVNTI + select SSE2 Modified: trunk/src/cpu/via/model_c7/Kconfig ============================================================================== --- trunk/src/cpu/via/model_c7/Kconfig Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/cpu/via/model_c7/Kconfig Thu Feb 25 14:40:49 2010 (r5159) @@ -1,3 +1,4 @@ config CPU_VIA_C7 bool select UDELAY_TSC + select SSE2 Modified: trunk/src/lib/ramtest.c ============================================================================== --- trunk/src/lib/ramtest.c Wed Feb 24 17:36:56 2010 (r5158) +++ trunk/src/lib/ramtest.c Thu Feb 25 14:40:49 2010 (r5159) @@ -1,6 +1,8 @@ static void write_phys(unsigned long addr, unsigned long value) { -#if CONFIG_HAVE_MOVNTI + // Assembler in lib/ is very ugly. But we properly guarded + // it so let's obey this one for now +#if CONFIG_SSE2 asm volatile( "movnti %1, (%0)" : /* outputs */ @@ -50,6 +52,10 @@ } write_phys(addr, addr); }; +#if CONFIG_SSE2 + // Needed for movnti + asm volatile ("sfence" ::: "memory"); +#endif /* Display final address */ #if CONFIG_USE_PRINTK_IN_CAR printk_debug("%08lx\r\nDRAM filled\r\n", addr); -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
