Author: uwe
Date: Sat Mar 13 21:16:48 2010
New Revision: 5204
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5204

Log:
Add SDRAMPWR_4DIMM Kconfig option (not user-visible in menuconfig).

Each Intel 440BX board should select this option if it has 4 DIMM
slots on the PCB, and _not_ select it (it defaults to 'n') if it
has 3 DIMMs on the PCB.

Signed-off-by: Keith Hui <[email protected]>
Acked-by: Uwe Hermann <[email protected]>

Modified:
   trunk/src/mainboard/asus/p2b-d/Kconfig
   trunk/src/mainboard/asus/p2b-ds/Kconfig
   trunk/src/mainboard/asus/p2b-ls/Kconfig
   trunk/src/mainboard/asus/p3b-f/Kconfig
   trunk/src/northbridge/intel/i440bx/Kconfig
   trunk/src/northbridge/intel/i440bx/raminit.c

Modified: trunk/src/mainboard/asus/p2b-d/Kconfig
==============================================================================
--- trunk/src/mainboard/asus/p2b-d/Kconfig      Sat Mar 13 13:54:58 2010        
(r5203)
+++ trunk/src/mainboard/asus/p2b-d/Kconfig      Sat Mar 13 21:16:48 2010        
(r5204)
@@ -31,6 +31,7 @@
        select SMP
        select UDELAY_TSC
        select BOARD_ROMSIZE_KB_256
+       select SDRAMPWR_4DIMM
 
 config MAINBOARD_DIR
        string

Modified: trunk/src/mainboard/asus/p2b-ds/Kconfig
==============================================================================
--- trunk/src/mainboard/asus/p2b-ds/Kconfig     Sat Mar 13 13:54:58 2010        
(r5203)
+++ trunk/src/mainboard/asus/p2b-ds/Kconfig     Sat Mar 13 21:16:48 2010        
(r5204)
@@ -31,6 +31,7 @@
        select SMP
        select UDELAY_TSC
        select BOARD_ROMSIZE_KB_256
+       select SDRAMPWR_4DIMM
 
 config MAINBOARD_DIR
        string

Modified: trunk/src/mainboard/asus/p2b-ls/Kconfig
==============================================================================
--- trunk/src/mainboard/asus/p2b-ls/Kconfig     Sat Mar 13 13:54:58 2010        
(r5203)
+++ trunk/src/mainboard/asus/p2b-ls/Kconfig     Sat Mar 13 21:16:48 2010        
(r5204)
@@ -29,6 +29,7 @@
        select HAVE_PIRQ_TABLE
        select UDELAY_TSC
        select BOARD_ROMSIZE_KB_256
+       select SDRAMPWR_4DIMM
 
 config MAINBOARD_DIR
        string

Modified: trunk/src/mainboard/asus/p3b-f/Kconfig
==============================================================================
--- trunk/src/mainboard/asus/p3b-f/Kconfig      Sat Mar 13 13:54:58 2010        
(r5203)
+++ trunk/src/mainboard/asus/p3b-f/Kconfig      Sat Mar 13 21:16:48 2010        
(r5204)
@@ -29,6 +29,7 @@
        select HAVE_PIRQ_TABLE
        select UDELAY_TSC
        select BOARD_ROMSIZE_KB_256
+       select SDRAMPWR_4DIMM
 
 config MAINBOARD_DIR
        string

Modified: trunk/src/northbridge/intel/i440bx/Kconfig
==============================================================================
--- trunk/src/northbridge/intel/i440bx/Kconfig  Sat Mar 13 13:54:58 2010        
(r5203)
+++ trunk/src/northbridge/intel/i440bx/Kconfig  Sat Mar 13 21:16:48 2010        
(r5204)
@@ -22,3 +22,16 @@
        bool
        select HAVE_HIGH_TABLES
 
+config SDRAMPWR_4DIMM
+       bool
+       depends on NORTHBRIDGE_INTEL_I440BX
+       default n
+       help
+         This option affects how the SDRAMC register is programmed.
+         Memory clock signals will not be routed properly if this option
+         is set wrong.
+       
+         If your board has 4 DIMM slots, you must use select this option, in
+         your Kconfig file of the board. On boards with 3 DIMM slots,
+         do _not_ select this option.
+

Modified: trunk/src/northbridge/intel/i440bx/raminit.c
==============================================================================
--- trunk/src/northbridge/intel/i440bx/raminit.c        Sat Mar 13 13:54:58 
2010        (r5203)
+++ trunk/src/northbridge/intel/i440bx/raminit.c        Sat Mar 13 21:16:48 
2010        (r5204)
@@ -292,7 +292,11 @@
         *         0 = 3 clocks of RAS# precharge
         *         1 = 2 clocks of RAS# precharge
         */
-       SDRAMC + 0, 0x00, 0x00,
+#if CONFIG_SDRAMPWR_4DIMM
+       SDRAMC + 0, 0x00, 0x10, /* The board has 4 DIMM slots. */
+#else
+       SDRAMC + 0, 0x00, 0x00, /* The board has 3 DIMM slots.*/
+#endif
        SDRAMC + 1, 0x00, 0x00,
 
        /* PGPOL - Paging Policy Register

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