Author: stepan Date: Sun Mar 28 23:26:54 2010 New Revision: 5307 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5307
Log: drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is more appropriate. Also, factor out post_code() for __PRE_RAM__ code and drop it from some mainboards. Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/arch/i386/include/arch/cpu.h trunk/src/arch/i386/include/arch/hlt.h trunk/src/arch/i386/include/arch/io.h trunk/src/arch/i386/lib/console.c trunk/src/arch/i386/lib/console_print.c trunk/src/include/cpu/amd/dualcore.h trunk/src/include/cpu/amd/mtrr.h trunk/src/include/cpu/amd/quadcore.h trunk/src/include/cpu/x86/cache.h trunk/src/include/cpu/x86/lapic.h trunk/src/include/cpu/x86/msr.h trunk/src/include/cpu/x86/mtrr.h trunk/src/include/cpu/x86/tsc.h trunk/src/include/stdlib.h trunk/src/include/string.h trunk/src/mainboard/amd/mahogany_fam10/romstage.c trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c trunk/src/mainboard/dell/s1850/reset.c trunk/src/mainboard/intel/eagleheights/reset.c trunk/src/mainboard/intel/jarrell/reset.c trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c trunk/src/mainboard/supermicro/x6dai_g/reset.c trunk/src/mainboard/supermicro/x6dhe_g/reset.c trunk/src/mainboard/supermicro/x6dhe_g2/reset.c trunk/src/mainboard/supermicro/x6dhr_ig/reset.c trunk/src/mainboard/supermicro/x6dhr_ig2/reset.c trunk/src/mainboard/tyan/s2912_fam10/romstage.c trunk/src/northbridge/via/cn400/cn400.h trunk/src/northbridge/via/cn700/cn700.h trunk/src/northbridge/via/vx800/vx800.h Modified: trunk/src/arch/i386/include/arch/cpu.h ============================================================================== --- trunk/src/arch/i386/include/arch/cpu.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/arch/i386/include/arch/cpu.h Sun Mar 28 23:26:54 2010 (r5307) @@ -104,7 +104,7 @@ #define X86_VENDOR_SIS 10 #define X86_VENDOR_UNKNOWN 0xff -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) && defined( __GNUC__) +#if !defined(__PRE_RAM__) #include <device/device.h> Modified: trunk/src/arch/i386/include/arch/hlt.h ============================================================================== --- trunk/src/arch/i386/include/arch/hlt.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/arch/i386/include/arch/hlt.h Sun Mar 28 23:26:54 2010 (r5307) @@ -1,7 +1,7 @@ #ifndef ARCH_HLT_H #define ARCH_HLT_H -#if defined( __ROMCC__) && !defined(__PRE_RAM__) && !defined(__GNUC__) +#if defined(__ROMCC__) static void hlt(void) { __builtin_hlt(); Modified: trunk/src/arch/i386/include/arch/io.h ============================================================================== --- trunk/src/arch/i386/include/arch/io.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/arch/i386/include/arch/io.h Sun Mar 28 23:26:54 2010 (r5307) @@ -9,7 +9,7 @@ * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" * versions of the single-IO instructions (inb_p/inw_p/..). */ -#if defined( __ROMCC__ ) && !defined (__GNUC__) +#if defined(__ROMCC__) static inline void outb(uint8_t value, uint16_t port) { __builtin_outb(value, port); @@ -42,7 +42,6 @@ return __builtin_inl(port); } #else - static inline void outb(uint8_t value, uint16_t port) { __asm__ __volatile__ ("outb %b0, %w1" : : "a" (value), "Nd" (port)); @@ -78,8 +77,7 @@ __asm__ __volatile__ ("inl %w1, %0" : "=a"(value) : "Nd" (port)); return value; } - -#endif /* __ROMCC__ && !__GNUC__*/ +#endif /* __ROMCC__ */ static inline void outsb(uint16_t port, const void *addr, unsigned long count) { @@ -136,6 +134,7 @@ ); } +#if 0 /* XXX XXX XXX This is a story from the evil API from hell XXX XXX XXX * We have different functions for memory access in pre-ram stage and ram * stage. Those in pre-ram stage are called write32 and expect the address @@ -173,6 +172,7 @@ { return *(volatile uint32_t *) addr; } +#endif #if !defined(__PRE_RAM__) static inline __attribute__((always_inline)) uint8_t read8(unsigned long addr) Modified: trunk/src/arch/i386/lib/console.c ============================================================================== --- trunk/src/arch/i386/lib/console.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/arch/i386/lib/console.c Sun Mar 28 23:26:54 2010 (r5307) @@ -19,6 +19,19 @@ print_info(console_test); } + +void post_code(u8 value) +{ +#if !defined(CONFIG_NO_POST) || CONFIG_NO_POST==0 +#if CONFIG_SERIAL_POST==1 + print_emerg("POST: 0x"); + print_emerg_hex8(value); + print_emerg("\r\n"); +#endif + outb(value, 0x80); +#endif +} + void die(const char *str) { print_emerg(str); Modified: trunk/src/arch/i386/lib/console_print.c ============================================================================== --- trunk/src/arch/i386/lib/console_print.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/arch/i386/lib/console_print.c Sun Mar 28 23:26:54 2010 (r5307) @@ -62,10 +62,6 @@ } } -/* Actually this should say defined(__ROMCC__) but that define is explicitly - * set in some romstage.c files to trigger the simple device_t version to be used. - * So __GNUCC__ does the right thing here. - */ #if defined (__ROMCC__) #define STATIC #else Modified: trunk/src/include/cpu/amd/dualcore.h ============================================================================== --- trunk/src/include/cpu/amd/dualcore.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/cpu/amd/dualcore.h Sun Mar 28 23:26:54 2010 (r5307) @@ -15,7 +15,7 @@ struct node_core_id get_node_core_id(unsigned int nb_cfg_54); #endif -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) struct device; unsigned get_apicid_base(unsigned ioapic_num); void amd_sibling_init(struct device *cpu); Modified: trunk/src/include/cpu/amd/mtrr.h ============================================================================== --- trunk/src/include/cpu/amd/mtrr.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/cpu/amd/mtrr.h Sun Mar 28 23:26:54 2010 (r5307) @@ -31,8 +31,8 @@ #define TOP_MEM_MASK 0x007fffff #define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) -#if !defined( __ROMCC__ ) && !defined (ASSEMBLY) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) && !defined(ASSEMBLY) void amd_setup_mtrrs(void); -#endif /* __ROMCC__ */ +#endif #endif /* CPU_AMD_MTRR_H */ Modified: trunk/src/include/cpu/amd/quadcore.h ============================================================================== --- trunk/src/include/cpu/amd/quadcore.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/cpu/amd/quadcore.h Sun Mar 28 23:26:54 2010 (r5307) @@ -34,7 +34,7 @@ struct node_core_id get_node_core_id(u32 nb_cfg_54); #endif -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) struct device; u32 get_apicid_base(u32 ioapic_num); void amd_sibling_init(struct device *cpu); Modified: trunk/src/include/cpu/x86/cache.h ============================================================================== --- trunk/src/include/cpu/x86/cache.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/cpu/x86/cache.h Sun Mar 28 23:26:54 2010 (r5307) @@ -41,8 +41,8 @@ wbinvd(); } -#if !defined( __ROMCC__) && !defined(__PRE_RAM__) && defined (__GNUC__) +#if !defined(__PRE_RAM__) void x86_enable_cache(void); -#endif /* !__ROMCC__ */ +#endif #endif /* CPU_X86_CACHE */ Modified: trunk/src/include/cpu/x86/lapic.h ============================================================================== --- trunk/src/include/cpu/x86/lapic.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/cpu/x86/lapic.h Sun Mar 28 23:26:54 2010 (r5307) @@ -69,7 +69,7 @@ void stop_this_cpu(void); #endif -#if ! defined (__ROMCC__) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) #define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr)))) @@ -106,7 +106,6 @@ return x; } - static inline void lapic_write_atomic(unsigned long reg, unsigned long v) { xchg((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg), v); @@ -150,14 +149,11 @@ void setup_lapic(void); - #if CONFIG_SMP == 1 struct device; int start_cpu(struct device *cpu); - #endif /* CONFIG_SMP */ - -#endif /* !__ROMCC__ && !__PRE_RAM__ */ +#endif /* !__PRE_RAM__ */ #endif /* CPU_X86_LAPIC_H */ Modified: trunk/src/include/cpu/x86/msr.h ============================================================================== --- trunk/src/include/cpu/x86/msr.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/cpu/x86/msr.h Sun Mar 28 23:26:54 2010 (r5307) @@ -1,7 +1,7 @@ #ifndef CPU_X86_MSR_H #define CPU_X86_MSR_H -#if defined( __ROMCC__) +#if defined(__ROMCC__) typedef __builtin_msr_t msr_t; @@ -45,5 +45,4 @@ #endif /* __ROMCC__ */ - #endif /* CPU_X86_MSR_H */ Modified: trunk/src/include/cpu/x86/mtrr.h ============================================================================== --- trunk/src/include/cpu/x86/mtrr.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/cpu/x86/mtrr.h Sun Mar 28 23:26:54 2010 (r5307) @@ -32,18 +32,15 @@ #define MTRRfix4K_F8000_MSR 0x26f -#if !defined(__ROMCC__) && !defined (ASSEMBLY) && !defined(__PRE_RAM__) - +#if !defined (ASSEMBLY) && !defined(__PRE_RAM__) #include <device/device.h> - void enable_fixed_mtrr(void); void x86_setup_var_mtrrs(unsigned address_bits); void x86_setup_mtrrs(unsigned address_bits); int x86_mtrr_check(void); void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res); void x86_setup_fixed_mtrrs(void); - -#endif /* __ROMCC__ */ +#endif #endif /* CPU_X86_MTRR_H */ Modified: trunk/src/include/cpu/x86/tsc.h ============================================================================== --- trunk/src/include/cpu/x86/tsc.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/cpu/x86/tsc.h Sun Mar 28 23:26:54 2010 (r5307) @@ -17,7 +17,8 @@ return res; } -#if !defined( __ROMCC__ ) && !defined (__PRE_RAM__) +#if !defined(__ROMCC__) +/* Too many registers for ROMCC */ static inline unsigned long long rdtscll(void) { unsigned long long val; Modified: trunk/src/include/stdlib.h ============================================================================== --- trunk/src/include/stdlib.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/stdlib.h Sun Mar 28 23:26:54 2010 (r5307) @@ -11,7 +11,7 @@ #define MIN(a,b) ((a) < (b) ? (a) : (b)) #define MAX(a,b) ((a) > (b) ? (a) : (b)) -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) void *malloc(size_t size); void free(void *ptr); #endif Modified: trunk/src/include/string.h ============================================================================== --- trunk/src/include/string.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/include/string.h Sun Mar 28 23:26:54 2010 (r5307) @@ -8,7 +8,7 @@ void *memmove(void *dest, const void *src, size_t n); void *memset(void *s, int c, size_t n); int memcmp(const void *s1, const void *s2, size_t n); -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) int sprintf(char * buf, const char *fmt, ...); #endif @@ -41,7 +41,7 @@ return 0; } -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) +#if !defined(__PRE_RAM__) static inline char *strdup(const char *s) { size_t sz = strlen(s) + 1; Modified: trunk/src/mainboard/amd/mahogany_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/romstage.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/amd/mahogany_fam10/romstage.c Sun Mar 28 23:26:54 2010 (r5307) @@ -52,12 +52,6 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" - -/* FIXME: Use console.c post_code function */ -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "arch/i386/lib/console.c" #include "pc80/serial.c" #include "lib/ramtest.c" Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Sun Mar 28 23:26:54 2010 (r5307) @@ -52,12 +52,6 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" - -/* FIXME: Use console.c post_code function */ -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "arch/i386/lib/console.c" #include "pc80/serial.c" #include "lib/ramtest.c" Modified: trunk/src/mainboard/dell/s1850/reset.c ============================================================================== --- trunk/src/mainboard/dell/s1850/reset.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/dell/s1850/reset.c Sun Mar 28 23:26:54 2010 (r5307) @@ -1,18 +1,6 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/pci.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#else +#if defined (__PRE_RAM__) #include <arch/romcc_io.h> #endif @@ -20,6 +8,7 @@ { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); Modified: trunk/src/mainboard/intel/eagleheights/reset.c ============================================================================== --- trunk/src/mainboard/intel/eagleheights/reset.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/intel/eagleheights/reset.c Sun Mar 28 23:26:54 2010 (r5307) @@ -21,20 +21,8 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} +#if defined (__PRE_RAM__) +#include <arch/romcc_io.h> #endif void soft_reset(void) Modified: trunk/src/mainboard/intel/jarrell/reset.c ============================================================================== --- trunk/src/mainboard/intel/jarrell/reset.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/intel/jarrell/reset.c Sun Mar 28 23:26:54 2010 (r5307) @@ -1,42 +1,25 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif +#include <arch/romcc_io.h> void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); outb(0x06, 0xcf9); } + void full_reset(void) { - device_t dev; /* Enable power on after power fail... */ - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801ER_LPC), 0); - if (dev != PCI_DEV_INVALID) { - unsigned byte; - byte = pci_read_config8(dev, 0xa4); - byte &= 0xfe; - pci_write_config8(dev, 0xa4, byte); - - } + unsigned byte; + byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4); + byte &= 0xfe; + pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, byte); outb(0x0e, 0xcf9); } Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Sun Mar 28 23:26:54 2010 (r5307) @@ -49,11 +49,6 @@ // for enable the FAN #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" - -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" Modified: trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Sun Mar 28 23:26:54 2010 (r5307) @@ -50,10 +50,6 @@ // for enable the FAN #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" Modified: trunk/src/mainboard/supermicro/x6dai_g/reset.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dai_g/reset.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/supermicro/x6dai_g/reset.c Sun Mar 28 23:26:54 2010 (r5307) @@ -1,20 +1,5 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { Modified: trunk/src/mainboard/supermicro/x6dhe_g/reset.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g/reset.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/supermicro/x6dhe_g/reset.c Sun Mar 28 23:26:54 2010 (r5307) @@ -1,25 +1,11 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); Modified: trunk/src/mainboard/supermicro/x6dhe_g2/reset.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g2/reset.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/supermicro/x6dhe_g2/reset.c Sun Mar 28 23:26:54 2010 (r5307) @@ -1,25 +1,11 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); Modified: trunk/src/mainboard/supermicro/x6dhr_ig/reset.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig/reset.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/supermicro/x6dhr_ig/reset.c Sun Mar 28 23:26:54 2010 (r5307) @@ -1,25 +1,11 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/reset.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig2/reset.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/supermicro/x6dhr_ig2/reset.c Sun Mar 28 23:26:54 2010 (r5307) @@ -1,25 +1,11 @@ #include <arch/io.h> #include <reset.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) -#define PCI_DEV_INVALID 0 - -static inline device_t pci_locate_device(unsigned pci_id, device_t from) -{ - return dev_find_device(pci_id >> 16, pci_id & 0xffff, from); -} -#endif void soft_reset(void) { outb(0x04, 0xcf9); } + void hard_reset(void) { outb(0x02, 0xcf9); Modified: trunk/src/mainboard/tyan/s2912_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/romstage.c Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/mainboard/tyan/s2912_fam10/romstage.c Sun Mar 28 23:26:54 2010 (r5307) @@ -48,11 +48,6 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" - -static void post_code(u8 value) { - outb(value, 0x80); -} - #include "pc80/serial.c" #include "arch/i386/lib/console.c" #if CONFIG_USBDEBUG_DIRECT Modified: trunk/src/northbridge/via/cn400/cn400.h ============================================================================== --- trunk/src/northbridge/via/cn400/cn400.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/northbridge/via/cn400/cn400.h Sun Mar 28 23:26:54 2010 (r5307) @@ -18,7 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef __ROMCC__ +#ifndef __PRE_RAM__ static void cn400_noop(void) { } Modified: trunk/src/northbridge/via/cn700/cn700.h ============================================================================== --- trunk/src/northbridge/via/cn700/cn700.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/northbridge/via/cn700/cn700.h Sun Mar 28 23:26:54 2010 (r5307) @@ -18,7 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if !defined (__ROMCC__) && !defined (__PRE_RAM__) +#if !defined (__PRE_RAM__) static void cn700_noop() { } Modified: trunk/src/northbridge/via/vx800/vx800.h ============================================================================== --- trunk/src/northbridge/via/vx800/vx800.h Sun Mar 28 17:11:56 2010 (r5306) +++ trunk/src/northbridge/via/vx800/vx800.h Sun Mar 28 23:26:54 2010 (r5307) @@ -20,7 +20,7 @@ #ifndef VX800_H #define VX800_H 1 -#ifndef __ROMCC__ +#ifndef __PRE_RAM__ static void vx800_noop() { } -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
