Author: stepan Date: Fri Apr 9 13:55:43 2010 New Revision: 5391 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5391
Log: remove some amd mainboard warnings. Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/mainboard/amd/dbm690t/acpi_tables.c trunk/src/mainboard/amd/dbm690t/mainboard.c trunk/src/mainboard/amd/mahogany/get_bus_conf.c trunk/src/mainboard/amd/pistachio/mainboard.c Modified: trunk/src/mainboard/amd/dbm690t/acpi_tables.c ============================================================================== --- trunk/src/mainboard/amd/dbm690t/acpi_tables.c Fri Apr 9 13:37:58 2010 (r5390) +++ trunk/src/mainboard/amd/dbm690t/acpi_tables.c Fri Apr 9 13:55:43 2010 (r5391) @@ -92,8 +92,6 @@ return current; } - - static void update_ssdtx(void *ssdtx, int i) { uint8_t *PCI; Modified: trunk/src/mainboard/amd/dbm690t/mainboard.c ============================================================================== --- trunk/src/mainboard/amd/dbm690t/mainboard.c Fri Apr 9 13:37:58 2010 (r5390) +++ trunk/src/mainboard/amd/dbm690t/mainboard.c Fri Apr 9 13:55:43 2010 (r5391) @@ -22,6 +22,7 @@ #include <device/pci.h> #include <arch/io.h> #include <boot/coreboot_tables.h> +#include <arch/coreboot_tables.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/pci_def.h> @@ -57,7 +58,7 @@ * RRG4.2.3.1 GPM pins as Input * RRG4.2.3.2 GPM pins as Output ********************************************************/ -static void enable_onboard_nic() +static void enable_onboard_nic(void) { u8 byte; @@ -94,7 +95,7 @@ * IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to * get the cable type, 40 pin or 80 pin? ********************************************************/ -static void get_ide_dma66() +static void get_ide_dma66(void) { u8 byte; struct device *sm_dev; @@ -120,7 +121,7 @@ /* * set thermal config */ -static void set_thermal_config() +static void set_thermal_config(void) { u8 byte; u16 word; @@ -185,11 +186,8 @@ * enable the dedicated function in dbm690t board. * This function called early than rs690_enable. *************************************************/ -void dbm690t_enable(device_t dev) +static void dbm690t_enable(device_t dev) { - struct mainboard_config *mainboard = - (struct mainboard_config *)dev->chip_info; - printk(BIOS_INFO, "Mainboard DBM690T Enable. dev=0x%p\n", dev); #if (CONFIG_GFXUMA == 1) @@ -249,6 +247,7 @@ lb_add_memory_range(mem, LB_MEM_RESERVED, uma_memory_base, uma_memory_size); #endif + return 0; } struct chip_operations mainboard_ops = { Modified: trunk/src/mainboard/amd/mahogany/get_bus_conf.c ============================================================================== --- trunk/src/mainboard/amd/mahogany/get_bus_conf.c Fri Apr 9 13:37:58 2010 (r5390) +++ trunk/src/mainboard/amd/mahogany/get_bus_conf.c Fri Apr 9 13:55:43 2010 (r5391) @@ -63,8 +63,6 @@ static u32 get_bus_conf_done = 0; -void get_bus_conf(void); - void get_bus_conf(void) { u32 apicid_base; Modified: trunk/src/mainboard/amd/pistachio/mainboard.c ============================================================================== --- trunk/src/mainboard/amd/pistachio/mainboard.c Fri Apr 9 13:37:58 2010 (r5390) +++ trunk/src/mainboard/amd/pistachio/mainboard.c Fri Apr 9 13:55:43 2010 (r5391) @@ -22,6 +22,7 @@ #include <device/pci.h> #include <arch/io.h> #include <boot/coreboot_tables.h> +#include <arch/coreboot_tables.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/pci_def.h> @@ -57,7 +58,7 @@ * The R77 (on BRASS) / R81 (on Bronze) is not load! * So NIC can work whether this function runs. ********************************************************/ -static void enable_onboard_nic() +static void enable_onboard_nic(void) { u8 byte; @@ -77,7 +78,7 @@ /* * set thermal config */ -static void set_thermal_config() +static void set_thermal_config(void) { u8 byte, byte2; u16 word; @@ -256,11 +257,8 @@ * enable the dedicated function in pistachio board. * This function called early than rs690_enable. *************************************************/ -void pistachio_enable(device_t dev) +static void pistachio_enable(device_t dev) { - struct mainboard_config *mainboard = - (struct mainboard_config *)dev->chip_info; - printk(BIOS_INFO, "Mainboard Pistachio Enable. dev=0x%p\n", dev); #if (CONFIG_GFXUMA == 1) @@ -320,6 +318,7 @@ lb_add_memory_range(mem, LB_MEM_RESERVED, uma_memory_base, uma_memory_size); #endif + return 0; } struct chip_operations mainboard_ops = { -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
