Hi,
This patch removes a non-32-bit aligned Get_NB32 from
src/northbridge/amd/amdmct/mct/mct_d.c. The actual behavior should be
unchanged for I/O-based config space reads, but previous behavior was
wrong for MMCFG-based config space reads.
Perhaps we want pci_mmio_*_config* to enforce natural alignment as well?
Signed-off-by: Arne Georg Gleditsch <[email protected]>
--
Arne.
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index 22e9902..1779938 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -1970,7 +1970,7 @@ static void StitchMemory_D(struct MCTStatStruc *pMCTstat,
reg = 0x40 + (q << 2) + reg_off; /* Base[q] reg.*/
val = Get_NB32(dev, reg);
if (!(val & 3)) { /* (CSEnable|Spare==1)bank is enabled already? */
- reg = 0x60 + (q << 1) + reg_off; /*Mask[q] reg.*/
+ reg = 0x60 + ((q << 1) & 0xc) + reg_off; /*Mask[q] reg.*/
val = Get_NB32(dev, reg);
val >>= 19;
val++;
--
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