On Sat, Apr 24, 2010 at 07:13:11PM +0200, Stefan Reinauer wrote: > On 4/24/10 5:28 PM, Kevin O'Connor wrote: > > If I don't enable CONFIG_VGA_ROM_RUN I get: > > > > build/coreboot_ram.o: In function `vga_init': > > vga.c:(.text+0x178d): undefined reference to `mainboard_interrupt_handlers' [...] > > I'm not sure if the delay is because RAMBASE moved or because of > > something related to the vga code. > Oh, can you just add the rambase at 0x4000 again and try that? This > sounds like a caching issue and it should be investigated (we have such > issues on AMD platforms, too)
Reverting the RAMBASE part of the patch fixes the timing. > > It's been a while since I've used coreboot's vga init code - what's > > the best way to test that - filo? > > > I think so, yes. I ran a test with filo and a coreboot executed vga optionrom - it works fine on my epia-cn. (As an aside, filo takes several seconds longer than seabios to init.) So, the patch works for me with the exception of RAMBASE and CONFIG_VGA_ROM_RUN. -Kevin -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
