Am 08.05.2010 23:40, schrieb Stefan Reinauer: > On 5/8/10 10:59 PM, Patrick Georgi wrote: >> Index: src/include/lib.h >> =================================================================== >> --- src/include/lib.h (Revision 5532) >> +++ src/include/lib.h (Arbeitskopie) >> @@ -49,5 +49,7 @@ >> void cache_as_ram_main(unsigned long bist, unsigned long >> cpu_init_detectedx); >> #endif >> >> +#else /* __ROMCC__ */ >> +#include "pc80/serial.c" >> #endif /* __ROMCC__ */ >> #endif /* __LIB_H__ */ >> > It looks like only console/console.h is actually using these functions, > so I think it should rather be included in console/console.h than in lib.h? Oops, that was the older version of the patch (this won't even compile on all boards)
See attached patch instead Signed-off-by: Patrick Georgi <[email protected]>
Index: src/include/console/console.h =================================================================== --- src/include/console/console.h (revision 5532) +++ src/include/console/console.h (working copy) @@ -129,6 +129,7 @@ #define print_spew_hex32(HEX) printk(BIOS_SPEW, "%08x", (HEX)) #else +#include <pc80/serial.c> /* __ROMCC__ */ static void __console_tx_byte(unsigned char byte) Index: src/mainboard/axus/tc320/romstage.c =================================================================== --- src/mainboard/axus/tc320/romstage.c (revision 5532) +++ src/mainboard/axus/tc320/romstage.c (working copy) @@ -24,7 +24,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" Index: src/mainboard/bcom/winnet100/romstage.c =================================================================== --- src/mainboard/bcom/winnet100/romstage.c (revision 5532) +++ src/mainboard/bcom/winnet100/romstage.c (working copy) @@ -24,7 +24,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" Index: src/mainboard/televideo/tc7020/romstage.c =================================================================== --- src/mainboard/televideo/tc7020/romstage.c (revision 5532) +++ src/mainboard/televideo/tc7020/romstage.c (working copy) @@ -24,7 +24,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" Index: src/mainboard/supermicro/x6dai_g/romstage.c =================================================================== --- src/mainboard/supermicro/x6dai_g/romstage.c (revision 5532) +++ src/mainboard/supermicro/x6dai_g/romstage.c (working copy) @@ -7,7 +7,6 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "pc80/udelay_io.c" Index: src/mainboard/supermicro/x6dhe_g/romstage.c =================================================================== --- src/mainboard/supermicro/x6dhe_g/romstage.c (revision 5532) +++ src/mainboard/supermicro/x6dhe_g/romstage.c (working copy) @@ -7,7 +7,6 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "pc80/udelay_io.c" Index: src/mainboard/supermicro/x6dhe_g2/romstage.c =================================================================== --- src/mainboard/supermicro/x6dhe_g2/romstage.c (revision 5532) +++ src/mainboard/supermicro/x6dhe_g2/romstage.c (working copy) @@ -7,7 +7,6 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Index: src/mainboard/supermicro/x6dhr_ig/romstage.c =================================================================== --- src/mainboard/supermicro/x6dhr_ig/romstage.c (revision 5532) +++ src/mainboard/supermicro/x6dhr_ig/romstage.c (working copy) @@ -7,7 +7,6 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Index: src/mainboard/supermicro/x6dhr_ig2/romstage.c =================================================================== --- src/mainboard/supermicro/x6dhr_ig2/romstage.c (revision 5532) +++ src/mainboard/supermicro/x6dhr_ig2/romstage.c (working copy) @@ -7,7 +7,6 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Index: src/mainboard/soyo/sy-6ba-plus-iii/romstage.c =================================================================== --- src/mainboard/soyo/sy-6ba-plus-iii/romstage.c (revision 5532) +++ src/mainboard/soyo/sy-6ba-plus-iii/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/a-trend/atc-6240/romstage.c =================================================================== --- src/mainboard/a-trend/atc-6240/romstage.c (revision 5532) +++ src/mainboard/a-trend/atc-6240/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/a-trend/atc-6220/romstage.c =================================================================== --- src/mainboard/a-trend/atc-6220/romstage.c (revision 5532) +++ src/mainboard/a-trend/atc-6220/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/gigabyte/ga-6bxc/romstage.c =================================================================== --- src/mainboard/gigabyte/ga-6bxc/romstage.c (revision 5532) +++ src/mainboard/gigabyte/ga-6bxc/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/digitallogic/msm586seg/romstage.c =================================================================== --- src/mainboard/digitallogic/msm586seg/romstage.c (revision 5532) +++ src/mainboard/digitallogic/msm586seg/romstage.c (working copy) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" Index: src/mainboard/mitac/6513wu/romstage.c =================================================================== --- src/mainboard/mitac/6513wu/romstage.c (revision 5532) +++ src/mainboard/mitac/6513wu/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" Index: src/mainboard/olpc/btest/romstage.c =================================================================== --- src/mainboard/olpc/btest/romstage.c (revision 5532) +++ src/mainboard/olpc/btest/romstage.c (working copy) @@ -4,7 +4,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" Index: src/mainboard/olpc/rev_a/romstage.c =================================================================== --- src/mainboard/olpc/rev_a/romstage.c (revision 5532) +++ src/mainboard/olpc/rev_a/romstage.c (working copy) @@ -4,7 +4,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" Index: src/mainboard/emulation/qemu-x86/romstage.c =================================================================== --- src/mainboard/emulation/qemu-x86/romstage.c (revision 5532) +++ src/mainboard/emulation/qemu-x86/romstage.c (working copy) @@ -7,7 +7,6 @@ #include <arch/hlt.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "pc80/udelay_io.c" #include "lib/delay.c" Index: src/mainboard/technologic/ts5300/romstage.c =================================================================== --- src/mainboard/technologic/ts5300/romstage.c (revision 5532) +++ src/mainboard/technologic/ts5300/romstage.c (working copy) @@ -11,7 +11,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" Index: src/mainboard/nokia/ip530/romstage.c =================================================================== --- src/mainboard/nokia/ip530/romstage.c (revision 5532) +++ src/mainboard/nokia/ip530/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/amd/rumba/romstage.c =================================================================== --- src/mainboard/amd/rumba/romstage.c (revision 5532) +++ src/mainboard/amd/rumba/romstage.c (working copy) @@ -4,7 +4,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" Index: src/mainboard/biostar/m6tba/romstage.c =================================================================== --- src/mainboard/biostar/m6tba/romstage.c (revision 5532) +++ src/mainboard/biostar/m6tba/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/azza/pt-6ibd/romstage.c =================================================================== --- src/mainboard/azza/pt-6ibd/romstage.c (revision 5532) +++ src/mainboard/azza/pt-6ibd/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/nec/powermate2000/romstage.c =================================================================== --- src/mainboard/nec/powermate2000/romstage.c (revision 5532) +++ src/mainboard/nec/powermate2000/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" Index: src/mainboard/iei/nova4899r/romstage.c =================================================================== --- src/mainboard/iei/nova4899r/romstage.c (revision 5532) +++ src/mainboard/iei/nova4899r/romstage.c (working copy) @@ -24,7 +24,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83977tf/w83977tf_early_serial.c" Index: src/mainboard/iei/juki-511p/romstage.c =================================================================== --- src/mainboard/iei/juki-511p/romstage.c (revision 5532) +++ src/mainboard/iei/juki-511p/romstage.c (working copy) @@ -24,7 +24,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83977f/w83977f_early_serial.c" Index: src/mainboard/hp/e_vectra_p2706t/romstage.c =================================================================== --- src/mainboard/hp/e_vectra_p2706t/romstage.c (revision 5532) +++ src/mainboard/hp/e_vectra_p2706t/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" /* TODO: It's a PC87364 actually! */ Index: src/mainboard/tyan/s1846/romstage.c =================================================================== --- src/mainboard/tyan/s1846/romstage.c (revision 5532) +++ src/mainboard/tyan/s1846/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/asi/mb_5blgp/romstage.c =================================================================== --- src/mainboard/asi/mb_5blgp/romstage.c (revision 5532) +++ src/mainboard/asi/mb_5blgp/romstage.c (working copy) @@ -23,7 +23,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" Index: src/mainboard/asi/mb_5blmp/romstage.c =================================================================== --- src/mainboard/asi/mb_5blmp/romstage.c (revision 5532) +++ src/mainboard/asi/mb_5blmp/romstage.c (working copy) @@ -24,7 +24,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" Index: src/mainboard/lippert/frontrunner/romstage.c =================================================================== --- src/mainboard/lippert/frontrunner/romstage.c (revision 5532) +++ src/mainboard/lippert/frontrunner/romstage.c (working copy) @@ -4,7 +4,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" Index: src/mainboard/abit/be6-ii_v2_0/romstage.c =================================================================== --- src/mainboard/abit/be6-ii_v2_0/romstage.c (revision 5532) +++ src/mainboard/abit/be6-ii_v2_0/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/via/epia-m/romstage.c =================================================================== --- src/mainboard/via/epia-m/romstage.c (revision 5532) +++ src/mainboard/via/epia-m/romstage.c (working copy) @@ -6,7 +6,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/vt8623/raminit.h" Index: src/mainboard/via/epia-n/romstage.c =================================================================== --- src/mainboard/via/epia-n/romstage.c (revision 5532) +++ src/mainboard/via/epia-n/romstage.c (working copy) @@ -26,7 +26,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/cn400/raminit.h" Index: src/mainboard/via/epia/romstage.c =================================================================== --- src/mainboard/via/epia/romstage.c (revision 5532) +++ src/mainboard/via/epia/romstage.c (working copy) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/vt8601/raminit.h" Index: src/mainboard/dell/s1850/romstage.c =================================================================== --- src/mainboard/dell/s1850/romstage.c (revision 5532) +++ src/mainboard/dell/s1850/romstage.c (working copy) @@ -7,7 +7,6 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Index: src/mainboard/compaq/deskpro_en_sff_p600/romstage.c =================================================================== --- src/mainboard/compaq/deskpro_en_sff_p600/romstage.c (revision 5532) +++ src/mainboard/compaq/deskpro_en_sff_p600/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/msi/ms6119/romstage.c =================================================================== --- src/mainboard/msi/ms6119/romstage.c (revision 5532) +++ src/mainboard/msi/ms6119/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/msi/ms6147/romstage.c =================================================================== --- src/mainboard/msi/ms6147/romstage.c (revision 5532) +++ src/mainboard/msi/ms6147/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/msi/ms6156/romstage.c =================================================================== --- src/mainboard/msi/ms6156/romstage.c (revision 5532) +++ src/mainboard/msi/ms6156/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/msi/ms6178/romstage.c =================================================================== --- src/mainboard/msi/ms6178/romstage.c (revision 5532) +++ src/mainboard/msi/ms6178/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" Index: src/mainboard/advantech/pcm-5820/romstage.c =================================================================== --- src/mainboard/advantech/pcm-5820/romstage.c (revision 5532) +++ src/mainboard/advantech/pcm-5820/romstage.c (working copy) @@ -23,7 +23,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" Index: src/mainboard/eaglelion/5bcm/romstage.c =================================================================== --- src/mainboard/eaglelion/5bcm/romstage.c (revision 5532) +++ src/mainboard/eaglelion/5bcm/romstage.c (working copy) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" //#include "southbridge/intel/i440bx/i440bx_early_smbus.c" Index: src/mainboard/intel/xe7501devkit/romstage.c =================================================================== --- src/mainboard/intel/xe7501devkit/romstage.c (revision 5532) +++ src/mainboard/intel/xe7501devkit/romstage.c (working copy) @@ -8,7 +8,6 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c" Index: src/mainboard/intel/truxton/romstage.c =================================================================== --- src/mainboard/intel/truxton/romstage.c (revision 5532) +++ src/mainboard/intel/truxton/romstage.c (working copy) @@ -27,7 +27,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include "pc80/udelay_io.c" #include <console/console.h> #include "lib/ramtest.c" Index: src/mainboard/intel/mtarvon/romstage.c =================================================================== --- src/mainboard/intel/mtarvon/romstage.c (revision 5532) +++ src/mainboard/intel/mtarvon/romstage.c (working copy) @@ -27,7 +27,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i3100/i3100_early_smbus.c" Index: src/mainboard/intel/jarrell/romstage.c =================================================================== --- src/mainboard/intel/jarrell/romstage.c (revision 5532) +++ src/mainboard/intel/jarrell/romstage.c (working copy) @@ -7,7 +7,6 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Index: src/mainboard/asus/p2b-ls/romstage.c =================================================================== --- src/mainboard/asus/p2b-ls/romstage.c (revision 5532) +++ src/mainboard/asus/p2b-ls/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/asus/mew-am/romstage.c =================================================================== --- src/mainboard/asus/mew-am/romstage.c (revision 5532) +++ src/mainboard/asus/mew-am/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" Index: src/mainboard/asus/p2b/romstage.c =================================================================== --- src/mainboard/asus/p2b/romstage.c (revision 5532) +++ src/mainboard/asus/p2b/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/asus/p2b-d/romstage.c =================================================================== --- src/mainboard/asus/p2b-d/romstage.c (revision 5532) +++ src/mainboard/asus/p2b-d/romstage.c (working copy) @@ -26,7 +26,6 @@ #include <arch/hlt.h> #include <stdlib.h> #include <cpu/x86/lapic.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/asus/p2b-f/romstage.c =================================================================== --- src/mainboard/asus/p2b-f/romstage.c (revision 5532) +++ src/mainboard/asus/p2b-f/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/asus/p2b-ds/romstage.c =================================================================== --- src/mainboard/asus/p2b-ds/romstage.c (revision 5532) +++ src/mainboard/asus/p2b-ds/romstage.c (working copy) @@ -26,7 +26,6 @@ #include <arch/hlt.h> #include <stdlib.h> #include <cpu/x86/lapic.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/asus/p3b-f/romstage.c =================================================================== --- src/mainboard/asus/p3b-f/romstage.c (revision 5532) +++ src/mainboard/asus/p3b-f/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" Index: src/mainboard/asus/mew-vm/romstage.c =================================================================== --- src/mainboard/asus/mew-vm/romstage.c (revision 5532) +++ src/mainboard/asus/mew-vm/romstage.c (working copy) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" #include <console/console.h> #include "lib/ramtest.c" #include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"
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