Author: stepan Date: Fri May 14 18:44:45 2010 New Revision: 5550 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5550
Log: Fix i945 ACPI for ASL Optimizing Compiler version 20100428. The values are overwritten on the fly but without the patch iasl will refuse to compile the code. Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/northbridge/intel/i945/acpi/i945_hostbridge.asl Modified: trunk/src/northbridge/intel/i945/acpi/i945_hostbridge.asl ============================================================================== --- trunk/src/northbridge/intel/i945/acpi/i945_hostbridge.asl Fri May 14 18:40:55 2010 (r5549) +++ trunk/src/northbridge/intel/i945/acpi/i945_hostbridge.asl Fri May 14 18:44:45 2010 (r5550) @@ -207,17 +207,17 @@ 0x00000000, 0x000f0000, 0x000fffff, 0x00000000, 0x00010000,,, FSEG) - // PCI Memory Region (Top of memory-0xfebfffff) - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0x00000000, 0xfebfffff, 0x00000000, - 0x00000000,,, PM01) + // PCI Memory Region (Top of memory-0xfebfffff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x00000000, 0xfebfffff, 0x00000000, + 0xfec00000,,, PM01) - // TPM Area (0xfed40000-0xfed44fff) - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, 0xfed40000, 0xfed44fff, 0x00000000, - 0x00000000,,, TPMR) + // TPM Area (0xfed40000-0xfed44fff) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0xfed40000, 0xfed44fff, 0x00000000, + 0x00005000,,, TPMR) }) // Find PCI resource area in MCRS -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
