On Fri, May 21, 2010 at 05:04:26PM -0400, Carl-Daniel Hailfinger wrote: > > On Fri, May 21, 2010 at 12:10:51PM -0400, Myles Watson wrote: > >> On Fri, May 14, 2010 at 1:49 PM, Joe Korty <[email protected]> wrote: > > I've solved this one, kind of. It is PCI IO Space > > overflow, we are going over 0xffff which apparently is > > a hard limit. I image this is there so that inb, outw, > > etc instructions can be used to reference these devices. > > > > But if one doesn't use such instructions (instead using > > memory mapped PCI IO space), I see no reason why Linux > > and coreboot couldn't work with PCI IO Space addresses > >> 0xffff. > > I'm interested in how you want to map port IO space to memory. > Please explain. > > AFAIK PCI register space is totally independent of port IO space which > is totally independent of memory space. You can access PCI register > space via CF8/CFC port IO and via MMCONFIG memory, but I'm unaware of > any mechanisms to map IO ports to memory or the other way round.
Well, all I know at this point is that the Linux kernel sources have code that maps inb etc either to the instructions or to a memory dereference, and the .config for that chooses memory dereference for x86. It's gonna be fun seeing if high-IO-address space can be made to work.. Regards, Joe -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
