On 06/15/2010 11:54 AM, Joseph Smith wrote:
On Tue, 15 Jun 2010 10:28:51 -0400, Joseph Smith<[email protected]>
wrote:
On Tue, 15 Jun 2010 16:16:46 +0200, Stefan Reinauer
<[email protected]>
wrote:
On 6/15/10 4:07 PM, Joseph Smith wrote:
When
I cold boot it, if I hit the reset button before Linux starts, it
restarts
with coreboot serial console just fine.
Hm...
Maybe 0x2e/0x4e are mapped to LPC after the SuperIO is configured (and
that mapping survives a reset)... that would be a southbridge init
issue.
Hmm, This is interesting. The first time I booted it, I had copied
romstage
from another board that had:
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
And I got coreboot serial console (early_serial) just fine but when it
came
to detecting and inializing the superio, I got all kinds of errors from
coreboot about device not found.
So I changed it to 0x2e as described in the datasheet and detected with
superiotool(vendor bios), and that is when this problem started. But now
coreboot is happy, detects the device and the resource allocator is
happy,
I just do not get early_serial on cold boot.
This is weird!
Or, the hardware has to stabilize after power on before you can
configure the SuperIO.
Maybe?
Hmm from page 142 in the datasheet, I need to figure out of there is a
pull-down resistor connected to the SYSOPT pin to use 0x2e or if there is a
pull-up resistor connected to the SYSOPT pin to use 0x4e. And once powered
up the configuration port base address can be changed through CR26 and
CR27.
I bet you that there is a pull-up resistor connected to the SYSOPT pin and
0x4e is supposed to be used. And the vendor bios changes this to 0x2e at
some point. That is what is throwing me off!
So I will try:
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
and change all the devices in devicetree.cb to 4e.
My question is does it need to get changed to 0x2e at some point? Or can I
just leave it at 0x4e? Will it matter to OS?
Thanks for all the brainstorming help Stefan and Ron.
Yup that did it :-)
Looks like SYSOPT had a pull-up resistor so 0x4e works great.
But there is one other small issue. Looks like the resource allocater is
not allocating any space for device 43.a the Runtime Registers.
My devicetree.cb looks like:
device pnp 4e.a on # Runtime registers
io 0x60 = 0x800
end
But my bootlog (attached) shows:
PNP: 004e.a resource base 800 size 0 align 0 gran 0 limit 0 flags
c0000100 index 60
skipping PNP: 004...@60 fixed resource, size=0!
PNP: 004e.a 60 <- [0x0000000800 - 0x00000007ff] size 0x00000000 gran 0x00 io
PNP: 004e.a resource base 800 size 0 align 0 gran 0 limit 0 flags
e0000100 index 60
Is it supposed to look like that?
--
Thanks,
Joseph Smith
Set-Top-Linux
www.settoplinux.org
coreboot-4.0-r5631M Tue Jun 15 18:13:07 EDT 2010 starting...
SMBus controller enabled
Found DIMM in slot 00
DIMM is 0x80MB
After translation, dimm_size is 0x0d
Found DIMM in slot 01
DIMM is 0x80MB
After translation, dimm_size is 0x0d
DRP calculated to 0xdd
BUFF_SC calculated to 0x55c6
Loading stage image.
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (147456 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
coreboot-4.0-r5631M Tue Jun 15 18:13:07 EDT 2010 booting...
Calibrating delay loop...
end 86dc0e6c, start 2c94ed18
32-bit delta 1444
calibrate_tsc 32-bit result is 1444
clocks_per_usec: 1444
Enumerating buses...
Show all devs...Before Device Enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 004e.0: enabled 1
PNP: 004e.3: enabled 1
PNP: 004e.4: enabled 1
PNP: 004e.5: enabled 0
PNP: 004e.7: enabled 1
PNP: 004e.9: enabled 0
PNP: 004e.a: enabled 1
PNP: 004e.b: enabled 0
PCI: 00:1f.1: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 1
PCI: 00:1f.5: enabled 1
PCI: 00:1f.6: enabled 0
Compare with tree...
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 004e.0: enabled 1
PNP: 004e.3: enabled 1
PNP: 004e.4: enabled 1
PNP: 004e.5: enabled 0
PNP: 004e.7: enabled 1
PNP: 004e.9: enabled 0
PNP: 004e.a: enabled 1
PNP: 004e.b: enabled 0
PCI: 00:1f.1: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 1
PCI: 00:1f.5: enabled 1
PCI: 00:1f.6: enabled 0
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/7124] ops
PCI: 00:00.0 [8086/7124] enabled
PCI: 00:01.0 [8086/7125] enabled
PCI: 00:1e.0 [8086/244e] bus ops
PCI: 00:1e.0 [8086/244e] enabled
PCI: 00:1f.0 [8086/2440] bus ops
PCI: 00:1f.0 [8086/2440] enabled
PCI: 00:1f.1 [8086/244b] ops
PCI: 00:1f.1 [8086/244b] enabled
PCI: 00:1f.2 [8086/2442] ops
PCI: 00:1f.2 [8086/2442] enabled
PCI: 00:1f.3 [8086/2443] enabled
PCI: 00:1f.4 [8086/2444] ops
PCI: 00:1f.4 [8086/2444] enabled
PCI: 00:1f.5 [8086/2445] ops
PCI: 00:1f.5 [8086/2445] enabled
do_pci_scan_bridge for PCI: 00:1e.0
malloc Enter, size 24, free_mem_ptr 00120000
malloc 00120000
PCI: pci_scan_bus for bus 01
malloc Enter, size 68, free_mem_ptr 00120018
malloc 00120018
PCI: 01:08.0 [8086/2449] ops
PCI: 01:08.0 [8086/2449] enabled
PCI: pci_scan_bus returning with max=001
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:1f.0
Found SMSC Super I/O (ID=0x59, rev=0x01)
malloc Enter, size 2560, free_mem_ptr 0012005c
malloc 0012005c
PNP: 004e.0 enabled
PNP: 004e.3 enabled
PNP: 004e.4 enabled
PNP: 004e.5 disabled
PNP: 004e.7 enabled
PNP: 004e.9 disabled
PNP: 004e.a enabled
PNP: 004e.b disabled
scan_static_bus for PCI: 00:1f.0 done
PCI: pci_scan_bus returning with max=001
scan_static_bus for Root Device done
done
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:1e.0 read_resources bus 1 link: 0
PCI: 00:1e.0 read_resources bus 1 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags
40040100 index 10000000
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags
40040200 index 10000100
PCI: 00:00.0
PCI: 00:01.0
PCI: 00:01.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff
flags 1200 index 10
PCI: 00:01.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff
flags 200 index 14
PCI: 00:1e.0 child on link 0 PCI: 01:08.0
PCI: 00:1e.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102
index 1c
PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags
81202 index 24
PCI: 00:1e.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags
80202 index 20
PCI: 01:08.0
PCI: 01:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff
flags 200 index 10
PCI: 01:08.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100
index 14
PCI: 00:1f.0 child on link 0 PNP: 004e.0
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100
index 10000000
PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags
c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags
c0000200 index 3
PNP: 004e.0
PNP: 004e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags
c0000100 index 60
PNP: 004e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400
index 70
PNP: 004e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800
index 74
PNP: 004e.3
PNP: 004e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags
c0000100 index 60
PNP: 004e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400
index 70
PNP: 004e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000800
index 74
PNP: 004e.4
PNP: 004e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags
c0000100 index 60
PNP: 004e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400
index 70
PNP: 004e.5
PNP: 004e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index
60
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.7
PNP: 004e.7 resource base 60 size 1 align 0 gran 0 limit ffffffff flags
c0000100 index 60
PNP: 004e.7 resource base 64 size 1 align 0 gran 0 limit ffffffff flags
c0000100 index 62
PNP: 004e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400
index 70
PNP: 004e.7 resource base c size 1 align 0 gran 0 limit 0 flags c0000400
index 72
PNP: 004e.9
PNP: 004e.a
PNP: 004e.a resource base 800 size 0 align 0 gran 0 limit 0 flags c0000100
index 60
PNP: 004e.b
PCI: 00:1f.1
PCI: 00:1f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100
index 20
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 20
PCI: 00:1f.3
PCI: 00:1f.3 resource base 0 size 10 align 4 gran 4 limit ffff flags 100
index 20
PCI: 00:1f.4
PCI: 00:1f.4 resource base 0 size 20 align 5 gran 5 limit ffff flags 100
index 20
PCI: 00:1f.5
PCI: 00:1f.5 resource base 0 size 100 align 8 gran 8 limit ffff flags 100
index 10
PCI: 00:1f.5 resource base 0 size 40 align 6 gran 6 limit ffff flags 100
index 14
PCI: 00:1f.6
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit:
ffff
PCI: 00:1e.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit:
ffff
PCI: 01:08.0 14 * [0x0 - 0x3f] io
PCI: 00:1e.0 compute_resources_io: base: 40 size: 1000 align: 12 gran: 12
limit: ffff done
PCI: 00:1e.0 1c * [0x0 - 0xfff] io
PCI: 00:1f.5 10 * [0x1000 - 0x10ff] io
PCI: 00:1f.5 14 * [0x1400 - 0x143f] io
PCI: 00:1f.2 20 * [0x1440 - 0x145f] io
PCI: 00:1f.4 20 * [0x1460 - 0x147f] io
PCI: 00:1f.1 20 * [0x1480 - 0x148f] io
PCI: 00:1f.3 20 * [0x1490 - 0x149f] io
PCI_DOMAIN: 0000 compute_resources_io: base: 14a0 size: 14a0 align: 12 gran: 0
limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit:
ffffffff
PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff
PCI: 00:1e.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff done
PCI: 00:1e.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit:
ffffffff
PCI: 01:08.0 10 * [0x0 - 0xfff] mem
PCI: 00:1e.0 compute_resources_mem: base: 1000 size: 100000 align: 20 gran: 20
limit: ffffffff done
PCI: 00:01.0 10 * [0x0 - 0x3ffffff] prefmem
PCI: 00:1e.0 20 * [0x4000000 - 0x40fffff] mem
PCI: 00:01.0 14 * [0x4100000 - 0x417ffff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 4180000 size: 4180000 align: 26
gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 00:1e.0
constrain_resources: PCI: 01:08.0
constrain_resources: PCI: 00:1f.0
constrain_resources: PNP: 004e.0
constrain_resources: PNP: 004e.3
constrain_resources: PNP: 004e.4
constrain_resources: PNP: 004e.7
constrain_resources: PNP: 004e.a
skipping PNP: 004...@60 fixed resource, size=0!
constrain_resources: PCI: 00:1f.1
constrain_resources: PCI: 00:1f.2
constrain_resources: PCI: 00:1f.3
constrain_resources: PCI: 00:1f.4
constrain_resources: PCI: 00:1f.5
avoid_fixed_resources2: PCI_DOMAIN: 0...@10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: PCI_DOMAIN: 0...@10000100 limit ffffffff
lim->base 00000000 lim->limit febfffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:14a0 align:12 gran:0
limit:ffff
Assigned: PCI: 00:1e.0 1c * [0x1000 - 0x1fff] io
Assigned: PCI: 00:1f.5 10 * [0x2000 - 0x20ff] io
Assigned: PCI: 00:1f.5 14 * [0x2400 - 0x243f] io
Assigned: PCI: 00:1f.2 20 * [0x2440 - 0x245f] io
Assigned: PCI: 00:1f.4 20 * [0x2460 - 0x247f] io
Assigned: PCI: 00:1f.1 20 * [0x2480 - 0x248f] io
Assigned: PCI: 00:1f.3 20 * [0x2490 - 0x249f] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 24a0 size: 14a0 align: 12
gran: 0 done
PCI: 00:1e.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12
limit:ffff
Assigned: PCI: 01:08.0 14 * [0x1000 - 0x103f] io
PCI: 00:1e.0 allocate_resources_io: next_base: 1040 size: 1000 align: 12 gran:
12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:f8000000 size:4180000 align:26
gran:0 limit:febfffff
Assigned: PCI: 00:01.0 10 * [0xf8000000 - 0xfbffffff] prefmem
Assigned: PCI: 00:1e.0 20 * [0xfc000000 - 0xfc0fffff] mem
Assigned: PCI: 00:01.0 14 * [0xfc100000 - 0xfc17ffff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: fc180000 size: 4180000
align: 26 gran: 0 done
PCI: 00:1e.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20
limit:febfffff
PCI: 00:1e.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20
gran: 20 done
PCI: 00:1e.0 allocate_resources_mem: base:fc000000 size:100000 align:20 gran:20
limit:febfffff
Assigned: PCI: 01:08.0 10 * [0xfc000000 - 0xfc000fff] mem
PCI: 00:1e.0 allocate_resources_mem: next_base: fc001000 size: 100000 align: 20
gran: 20 done
Root Device assign_resources, bus 0 link: 0
Setting RAM size to 256 MB
Allocating 1MB RAM for VGA
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 10 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a
prefmem
PCI: 00:01.0 14 <- [0x00fc100000 - 0x00fc17ffff] size 0x00080000 gran 0x13 mem
PCI: 00:1e.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus
01 io
PCI: 00:1e.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus
01 prefmem
PCI: 00:1e.0 20 <- [0x00fc000000 - 0x00fc0fffff] size 0x00100000 gran 0x14 bus
01 mem
PCI: 00:1e.0 assign_resources, bus 1 link: 0
PCI: 01:08.0 10 <- [0x00fc000000 - 0x00fc000fff] size 0x00001000 gran 0x0c mem
PCI: 01:08.0 14 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:1e.0 assign_resources, bus 1 link: 0
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 004e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 004e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 004e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 004e.3 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 004e.3 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
PNP: 004e.3 74 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 drq
PNP: 004e.4 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 004e.4 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 004e.7 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 004e.7 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 004e.7 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 004e.7 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 004e.a 60 <- [0x0000000800 - 0x00000007ff] size 0x00000000 gran 0x00 io
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.1 20 <- [0x0000002480 - 0x000000248f] size 0x00000010 gran 0x04 io
PCI: 00:1f.2 20 <- [0x0000002440 - 0x000000245f] size 0x00000020 gran 0x05 io
PCI: 00:1f.3 20 <- [0x0000002490 - 0x000000249f] size 0x00000010 gran 0x04 io
PCI: 00:1f.4 20 <- [0x0000002460 - 0x000000247f] size 0x00000020 gran 0x05 io
PCI: 00:1f.5 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 00:1f.5 14 <- [0x0000002400 - 0x000000243f] size 0x00000040 gran 0x06 io
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 1000 size 14a0 align 12 gran 0 limit ffff
flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base f8000000 size 4180000 align 26 gran 0 limit
febfffff flags 40040200 index 10000100
PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags
e0004200 index a
PCI_DOMAIN: 0000 resource base c0000 size fe40000 align 0 gran 0 limit 0
flags e0004200 index b
PCI: 00:00.0
PCI: 00:01.0
PCI: 00:01.0 resource base f8000000 size 4000000 align 26 gran 26 limit
febfffff flags 60001200 index 10
PCI: 00:01.0 resource base fc100000 size 80000 align 19 gran 19 limit
febfffff flags 60000200 index 14
PCI: 00:1e.0 child on link 0 PCI: 01:08.0
PCI: 00:1e.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags
60080102 index 1c
PCI: 00:1e.0 resource base febfffff size 0 align 20 gran 20 limit febfffff
flags 60081202 index 24
PCI: 00:1e.0 resource base fc000000 size 100000 align 20 gran 20 limit
febfffff flags 60080202 index 20
PCI: 01:08.0
PCI: 01:08.0 resource base fc000000 size 1000 align 12 gran 12 limit
febfffff flags 60000200 index 10
PCI: 01:08.0 resource base 1000 size 40 align 6 gran 6 limit ffff flags
60000100 index 14
PCI: 00:1f.0 child on link 0 PNP: 004e.0
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100
index 10000000
PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags
c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags
c0000200 index 3
PNP: 004e.0
PNP: 004e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags
e0000100 index 60
PNP: 004e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400
index 70
PNP: 004e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800
index 74
PNP: 004e.3
PNP: 004e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags
e0000100 index 60
PNP: 004e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400
index 70
PNP: 004e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000800
index 74
PNP: 004e.4
PNP: 004e.4 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags
e0000100 index 60
PNP: 004e.4 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400
index 70
PNP: 004e.5
PNP: 004e.5 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index
60
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.7
PNP: 004e.7 resource base 60 size 1 align 0 gran 0 limit ffffffff flags
e0000100 index 60
PNP: 004e.7 resource base 64 size 1 align 0 gran 0 limit ffffffff flags
e0000100 index 62
PNP: 004e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400
index 70
PNP: 004e.7 resource base c size 1 align 0 gran 0 limit 0 flags e0000400
index 72
PNP: 004e.9
PNP: 004e.a
PNP: 004e.a resource base 800 size 0 align 0 gran 0 limit 0 flags e0000100
index 60
PNP: 004e.b
PCI: 00:1f.1
PCI: 00:1f.1 resource base 2480 size 10 align 4 gran 4 limit ffff flags
60000100 index 20
PCI: 00:1f.2
PCI: 00:1f.2 resource base 2440 size 20 align 5 gran 5 limit ffff flags
60000100 index 20
PCI: 00:1f.3
PCI: 00:1f.3 resource base 2490 size 10 align 4 gran 4 limit ffff flags
60000100 index 20
PCI: 00:1f.4
PCI: 00:1f.4 resource base 2460 size 20 align 5 gran 5 limit ffff flags
60000100 index 20
PCI: 00:1f.5
PCI: 00:1f.5 resource base 2000 size 100 align 8 gran 8 limit ffff flags
60000100 index 10
PCI: 00:1f.5 resource base 2400 size 40 align 6 gran 6 limit ffff flags
60000100 index 14
PCI: 00:1f.6
Done allocating resources.
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 subsystem <- 8086/00
PCI: 00:01.0 cmd <- 07
PCI: 00:1e.0 bridge ctrl <- 0003
PCI: 00:1e.0 cmd <- 07
PCI: 01:08.0 cmd <- 03
PCI: 00:1f.0 cmd <- 0f
PCI: 00:1f.1 cmd <- 01
PCI: 00:1f.2 cmd <- 01
PCI: 00:1f.3 subsystem <- 8086/00
PCI: 00:1f.3 cmd <- 01
PCI: 00:1f.4 cmd <- 01
PCI: 00:1f.5 cmd <- 01
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
malloc Enter, size 68, free_mem_ptr 00120a5c
malloc 00120a5c
Initializing CPU #0
CPU: vendor Intel device 68a
CPU: family 06, model 08, stepping 0a
Enabling cache
Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
call enable_fixed_mtrr()
Setting variable MTRR 0, base: 0MB, range: 128MB, type WB
ADDRESS_MASK_HIGH=0xf
Setting variable MTRR 1, base: 128MB, range: 64MB, type WB
ADDRESS_MASK_HIGH=0xf
Setting variable MTRR 2, base: 192MB, range: 32MB, type WB
ADDRESS_MASK_HIGH=0xf
Setting variable MTRR 3, base: 224MB, range: 16MB, type WB
ADDRESS_MASK_HIGH=0xf
Setting variable MTRR 4, base: 240MB, range: 8MB, type WB
ADDRESS_MASK_HIGH=0xf
Setting variable MTRR 5, base: 248MB, range: 4MB, type WB
ADDRESS_MASK_HIGH=0xf
Running out of variable MTRRs!
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
microcode_info: sig = 0x0000068a pf=0x00000010 rev = 0x00000000
Disabling local apic...done.
CPU #0 initialized
PCI: 00:00.0 init
Northbridge init
PCI: 00:01.0 init
PCI: 00:1e.0 init
PCI: 00:1f.0 init
IOAPIC Southbridge enabled 2186
Southbridge APIC ID = 2000000
Set power on if power fails
RTC Init
PNP: 004e.0 init
PNP: 004e.3 init
PNP: 004e.4 init
PNP: 004e.7 init
Keyboard init...
No PS/2 keyboard detected.
PNP: 004e.a init
PCI: 00:1f.1 init
IDE0: Primary IDE interface is enabled
IDE1: Secondary IDE interface is enabled
PCI: 00:1f.2 init
PCI: 00:1f.3 init
PCI: 00:1f.4 init
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1f.0: enabled 1
PNP: 004e.0: enabled 1
PNP: 004e.3: enabled 1
PNP: 004e.4: enabled 1
PNP: 004e.5: enabled 0
PNP: 004e.7: enabled 1
PNP: 004e.9: enabled 0
PNP: 004e.a: enabled 1
PNP: 004e.b: enabled 0
PCI: 00:1f.1: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 1
PCI: 00:1f.5: enabled 1
PCI: 00:1f.6: enabled 0
PCI: 01:08.0: enabled 1
CPU: 00: enabled 1
Initializing CBMEM area to 0xfef0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 0fef0200...ok
High Tables Base is fef0000.
Copying Interrupt Routing Table to 0x000f0000... done.
Adding CBMEM entry as no. 2
Copying Interrupt Routing Table to 0x0fef0400... done.
PIRQ table: 144 bytes.
Multiboot Information structure has been written.
Adding CBMEM entry as no. 3
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518 checksum dbef
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x0fef1400
rom_table_end = 0x0fef1400
Adjust low_table_end from 0x00000518 to 0x00001000
Adjust rom_table_end from 0x0fef1400 to 0x0ff00000
Adding high table area
coreboot memory table:
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-000000000feeffff: RAM
3. 000000000fef0000-000000000fefffff: CONFIGURATION TABLES
Wrote coreboot table at: 0fef1400 - 0fef15b0 checksum 12e5
coreboot table: 432 bytes.
0. FREE SPACE 0fef3400 0000cc00
1. GDT 0fef0200 00000200
2. IRQ TABLE 0fef0400 00001000
3. COREBOOT 0fef1400 00002000
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + 9308 + align -> fff89340
Check fallback/payload
Got a payload
Loading segment from rom address 0xfff89378
data (compression=0)
malloc Enter, size 36, free_mem_ptr 00120aa0
malloc 00120aa0
New segment dstaddr 0xebd70 memsize 0x14290 srcaddr 0xfff893b0 filesize
0x14290
(cleaned up) New segment addr 0xebd70 size 0x14290 offset 0xfff893b0 filesize
0x14290
Loading segment from rom address 0xfff89394
Entry Point 0x000fc8b9
Loading Segment: addr: 0x00000000000ebd70 memsz: 0x0000000000014290 filesz:
0x0000000000014290
lb: [0x0000000000100000, 0x0000000000124000)
Post relocation: addr: 0x00000000000ebd70 memsz: 0x0000000000014290 filesz:
0x0000000000014290
it's not compressed!
[ 0x000ebd70, 00100000, 0x00100000) <- fff893b0
dest 000ebd70, end 00100000, bouncebuffer fea8000
Loaded segments
Jumping to boot code at fc8b9
entry = 0x000fc8b9
lb_start = 0x00100000
lb_size = 0x00024000
adjust = 0x0fdcc000
buffer = 0x0fea8000
elf_boot_notes = 0x00111c2c
adjusted_boot_notes = 0x0feddc2c
Start bios (version pre-0.6.1-20100614_005040-smitty3fc12)
Found mainboard Intel D810E2CB
Found CBFS header at 0xfffeffe0
Ram Size=0x0fef0000 (0x0000000000000000 high)
CPU Mhz=997
No apic - only the main cpu is present.
Copying PIR from 0x0fef0400 to 0x000fdc60
SMBIOS ptr=0x000fdc40 table=0x0feefef0
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga console
Starting SeaBIOS (version pre-0.6.1-20100614_005040-smitty3fc12)
UHCI init on dev 00:1f.2 (io=2440)
UHCI init on dev 00:1f.4 (io=2460)
Found 1 lpt ports
Found 1 serial ports
ATA controller 0 at 1f0/3f4/0 (irq 14 dev f9)
ATA controller 1 at 170/374/0 (irq 15 dev f9)
ata0-0: WDC WD400BB-00JHC0 ATA-6 Hard-Disk (38166 MiBytes)
drive 0x000fdbf0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=78165360
ebda moved from 9fc00 to 9f800
USB keyboard initialized
Got ps2 nak (status=51)
All threads complete.
Scan for option roms
Press F12 for boot menu.
Returned 57344 bytes of ZoneHigh
e820 map has 5 items:
0: 0000000000000000 - 000000000009f800 = 1
1: 000000000009f800 - 00000000000a0000 = 2
2: 00000000000f0000 - 0000000000100000 = 2
3: 0000000000100000 - 000000000feee000 = 1
4: 000000000feee000 - 000000000ff00000 = 2
enter handle_19:
NULL
Booting from Floppy...
Boot failed: could not read the boot disk
enter handle_18:
NULL
Booting from DVD/CD...
Boot failed: Could not read from CDROM (code 0001)
enter handle_18:
NULL
Booting from Hard Disk...
Booting from 0000:7c00
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