Author: linux_junkie Date: Sun Jun 20 20:59:40 2010 New Revision: 5635 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5635
Log: This patch implements GFXUMA on all supported i810 boards. Also some fix-ups to the i810 northbridge.c code. Signed-off-by: Joseph Smith <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/mainboard/asus/mew-am/Kconfig trunk/src/mainboard/asus/mew-am/mainboard.c trunk/src/mainboard/asus/mew-vm/Kconfig trunk/src/mainboard/asus/mew-vm/mainboard.c trunk/src/mainboard/ecs/p6iwp-fe/Kconfig trunk/src/mainboard/ecs/p6iwp-fe/mainboard.c trunk/src/mainboard/hp/e_vectra_p2706t/Kconfig trunk/src/mainboard/hp/e_vectra_p2706t/mainboard.c trunk/src/mainboard/mitac/6513wu/Kconfig trunk/src/mainboard/mitac/6513wu/mainboard.c trunk/src/mainboard/msi/ms6178/Kconfig trunk/src/mainboard/msi/ms6178/mainboard.c trunk/src/mainboard/nec/powermate2000/Kconfig trunk/src/mainboard/nec/powermate2000/mainboard.c trunk/src/northbridge/intel/i82810/northbridge.c Modified: trunk/src/mainboard/asus/mew-am/Kconfig ============================================================================== --- trunk/src/mainboard/asus/mew-am/Kconfig Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/asus/mew-am/Kconfig Sun Jun 20 20:59:40 2010 (r5635) @@ -28,6 +28,8 @@ select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select HAVE_MAINBOARD_RESOURCES + select GFXUMA config MAINBOARD_DIR string Modified: trunk/src/mainboard/asus/mew-am/mainboard.c ============================================================================== --- trunk/src/mainboard/asus/mew-am/mainboard.c Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/asus/mew-am/mainboard.c Sun Jun 20 20:59:40 2010 (r5635) @@ -19,8 +19,14 @@ */ #include <device/device.h> +#include <boot/tables.h> #include "chip.h" +int add_mainboard_resources(struct lb_memory *mem) +{ + return add_northbridge_resources(mem); +} + struct chip_operations mainboard_ops = { CHIP_NAME("ASUS MEW-AM Mainboard") }; Modified: trunk/src/mainboard/asus/mew-vm/Kconfig ============================================================================== --- trunk/src/mainboard/asus/mew-vm/Kconfig Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/asus/mew-vm/Kconfig Sun Jun 20 20:59:40 2010 (r5635) @@ -28,6 +28,8 @@ select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select HAVE_MAINBOARD_RESOURCES + select GFXUMA config MAINBOARD_DIR string Modified: trunk/src/mainboard/asus/mew-vm/mainboard.c ============================================================================== --- trunk/src/mainboard/asus/mew-vm/mainboard.c Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/asus/mew-vm/mainboard.c Sun Jun 20 20:59:40 2010 (r5635) @@ -1,6 +1,12 @@ #include <device/device.h> +#include <boot/tables.h> #include "chip.h" +int add_mainboard_resources(struct lb_memory *mem) +{ + return add_northbridge_resources(mem); +} + struct chip_operations mainboard_ops = { CHIP_NAME("ASUS MEW-VM Mainboard") }; Modified: trunk/src/mainboard/ecs/p6iwp-fe/Kconfig ============================================================================== --- trunk/src/mainboard/ecs/p6iwp-fe/Kconfig Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/ecs/p6iwp-fe/Kconfig Sun Jun 20 20:59:40 2010 (r5635) @@ -29,6 +29,8 @@ select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select HAVE_MAINBOARD_RESOURCES + select GFXUMA config MAINBOARD_DIR string Modified: trunk/src/mainboard/ecs/p6iwp-fe/mainboard.c ============================================================================== --- trunk/src/mainboard/ecs/p6iwp-fe/mainboard.c Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/ecs/p6iwp-fe/mainboard.c Sun Jun 20 20:59:40 2010 (r5635) @@ -19,8 +19,14 @@ */ #include <device/device.h> +#include <boot/tables.h> #include "chip.h" +int add_mainboard_resources(struct lb_memory *mem) +{ + return add_northbridge_resources(mem); +} + struct chip_operations mainboard_ops = { CHIP_NAME("ECS P6IWP-Fe Mainboard") }; Modified: trunk/src/mainboard/hp/e_vectra_p2706t/Kconfig ============================================================================== --- trunk/src/mainboard/hp/e_vectra_p2706t/Kconfig Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/hp/e_vectra_p2706t/Kconfig Sun Jun 20 20:59:40 2010 (r5635) @@ -31,6 +31,8 @@ select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select HAVE_MAINBOARD_RESOURCES + select GFXUMA config MAINBOARD_DIR string Modified: trunk/src/mainboard/hp/e_vectra_p2706t/mainboard.c ============================================================================== --- trunk/src/mainboard/hp/e_vectra_p2706t/mainboard.c Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/hp/e_vectra_p2706t/mainboard.c Sun Jun 20 20:59:40 2010 (r5635) @@ -19,8 +19,14 @@ */ #include <device/device.h> +#include <boot/tables.h> #include "chip.h" +int add_mainboard_resources(struct lb_memory *mem) +{ + return add_northbridge_resources(mem); +} + struct chip_operations mainboard_ops = { CHIP_NAME("HP e-Vectra P2706T Mainboard") }; Modified: trunk/src/mainboard/mitac/6513wu/Kconfig ============================================================================== --- trunk/src/mainboard/mitac/6513wu/Kconfig Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/mitac/6513wu/Kconfig Sun Jun 20 20:59:40 2010 (r5635) @@ -28,6 +28,8 @@ select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select HAVE_MAINBOARD_RESOURCES + select GFXUMA config MAINBOARD_DIR string Modified: trunk/src/mainboard/mitac/6513wu/mainboard.c ============================================================================== --- trunk/src/mainboard/mitac/6513wu/mainboard.c Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/mitac/6513wu/mainboard.c Sun Jun 20 20:59:40 2010 (r5635) @@ -19,8 +19,14 @@ */ #include <device/device.h> +#include <boot/tables.h> #include "chip.h" +int add_mainboard_resources(struct lb_memory *mem) +{ + return add_northbridge_resources(mem); +} + struct chip_operations mainboard_ops = { CHIP_NAME("Mitac 6513WU Mainboard") }; Modified: trunk/src/mainboard/msi/ms6178/Kconfig ============================================================================== --- trunk/src/mainboard/msi/ms6178/Kconfig Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/msi/ms6178/Kconfig Sun Jun 20 20:59:40 2010 (r5635) @@ -27,6 +27,8 @@ select ROMCC select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_512 + select HAVE_MAINBOARD_RESOURCES + select GFXUMA config MAINBOARD_DIR string Modified: trunk/src/mainboard/msi/ms6178/mainboard.c ============================================================================== --- trunk/src/mainboard/msi/ms6178/mainboard.c Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/msi/ms6178/mainboard.c Sun Jun 20 20:59:40 2010 (r5635) @@ -19,8 +19,14 @@ */ #include <device/device.h> +#include <boot/tables.h> #include "chip.h" +int add_mainboard_resources(struct lb_memory *mem) +{ + return add_northbridge_resources(mem); +} + struct chip_operations mainboard_ops = { CHIP_NAME("MSI MS-6178 Mainboard") }; Modified: trunk/src/mainboard/nec/powermate2000/Kconfig ============================================================================== --- trunk/src/mainboard/nec/powermate2000/Kconfig Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/nec/powermate2000/Kconfig Sun Jun 20 20:59:40 2010 (r5635) @@ -28,6 +28,8 @@ select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select HAVE_MAINBOARD_RESOURCES + select GFXUMA config MAINBOARD_DIR string Modified: trunk/src/mainboard/nec/powermate2000/mainboard.c ============================================================================== --- trunk/src/mainboard/nec/powermate2000/mainboard.c Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/mainboard/nec/powermate2000/mainboard.c Sun Jun 20 20:59:40 2010 (r5635) @@ -19,8 +19,14 @@ */ #include <device/device.h> +#include <boot/tables.h> #include "chip.h" +int add_mainboard_resources(struct lb_memory *mem) +{ + return add_northbridge_resources(mem); +} + struct chip_operations mainboard_ops = { CHIP_NAME("NEC PowerMate 2000 Mainboard") }; Modified: trunk/src/northbridge/intel/i82810/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i82810/northbridge.c Sat Jun 19 08:55:17 2010 (r5634) +++ trunk/src/northbridge/intel/i82810/northbridge.c Sun Jun 20 20:59:40 2010 (r5635) @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2007 Corey Osgood <[email protected]> + * Copyright (C) 2010 Joseph Smith <[email protected]> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -29,6 +30,7 @@ #include <bitops.h> #include <cpu/cpu.h> #include "chip.h" +#include <boot/tables.h> #include "northbridge.h" #include "i82810.h" @@ -100,6 +102,18 @@ return tolm; } +/* IGD UMA memory */ +uint64_t uma_memory_base=0, uma_memory_size=0; + +int add_northbridge_resources(struct lb_memory *mem) +{ + printk(BIOS_DEBUG, "Adding IGD UMA memory area\n"); + lb_add_memory_range(mem, LB_MEM_RESERVED, + uma_memory_base, uma_memory_size); + + return 0; +} + /* Table which returns the RAM size in MB when fed the DRP[7:4] or [3:0] value. * Note that 2 is a value which the DRP should never be programmed to. * Some size values appear twice, due to single-sided vs dual-sided banks. @@ -118,66 +132,67 @@ { device_t mc_dev; uint32_t pci_tolm; + int igd_memory = 0; pci_tolm = find_pci_tolm(dev->link_list); mc_dev = dev->link_list->children; + if (!mc_dev) + return; - if (mc_dev) { - /* Figure out which areas are/should be occupied by RAM. - * This is all computed in kilobytes and converted to/from - * the memory controller right at the edges. - * Having different variables in different units is - * too confusing to get right. Kilobytes are good up to - * 4 Terabytes of RAM... - */ - unsigned long tomk, tolmk; - int idx; - int drp_value; - - /* First get the value for DIMM 0. */ - drp_value = pci_read_config8(mc_dev, DRP); - /* Translate it to MB and add to tomk. */ - tomk = (unsigned long)(translate_i82810_to_mb[drp_value & 0xf]); - /* Now do the same for DIMM 1. */ - drp_value = drp_value >> 4; // >>= 4; //? mess with later - tomk += (unsigned long)(translate_i82810_to_mb[drp_value]); - - printk(BIOS_DEBUG, "Setting RAM size to %ld MB\n", tomk); - - /* Convert tomk from MB to KB. */ - tomk = tomk << 10; - -#if CONFIG_VIDEO_MB - /* Check for VGA reserved memory. */ - if (CONFIG_VIDEO_MB == 512) { - tomk -= 512; - printk(BIOS_DEBUG, "Allocating %s RAM for VGA\n", "512KB"); - } else if (CONFIG_VIDEO_MB == 1) { - tomk -= 1024 ; - printk(BIOS_DEBUG, "Allocating %s RAM for VGA\n", "1MB"); - } else { - printk(BIOS_DEBUG, "Allocating %s RAM for VGA\n", "0MB"); - } -#endif + unsigned long tomk, tolmk; + int idx, drp_value; + u8 reg8; + + reg8 = pci_read_config8(mc_dev, SMRAM); + reg8 &= 0xc0; + + switch (reg8) { + case 0xc0: + igd_memory = 1024; + printk(BIOS_DEBUG, "%dKB IGD UMA\n", igd_memory); + break; + case 0x80: + igd_memory = 512; + printk(BIOS_DEBUG, "%dKB IGD UMA\n", igd_memory); + break; + default: + igd_memory = 0; + printk(BIOS_DEBUG, "No IGD UMA Memory\n"); + break; + } - /* Compute the top of Low memory. */ - tolmk = pci_tolm >> 10; - if (tolmk >= tomk) { - /* The PCI hole does does not overlap the memory. */ - tolmk = tomk; - } - - /* Report the memory regions. */ - idx = 10; - ram_resource(dev, idx++, 0, 640); - ram_resource(dev, idx++, 768, tolmk - 768); + /* Get the value for DIMM 0 and translate it to MB. */ + drp_value = pci_read_config8(mc_dev, DRP); + tomk = (unsigned long)(translate_i82810_to_mb[drp_value & 0x0f]); + /* Get the value for DIMM 1 and translate it to MB. */ + drp_value = drp_value >> 4; + tomk += (unsigned long)(translate_i82810_to_mb[drp_value]); + /* Convert tomk from MB to KB. */ + tomk = tomk << 10; + tomk -= igd_memory; + + /* For reserving UMA memory in the memory map */ + uma_memory_base = tomk * 1024ULL; + uma_memory_size = igd_memory * 1024ULL; + printk(BIOS_DEBUG, "Available memory: %ldKB\n", tomk); + + /* Compute the top of low memory. */ + tolmk = pci_tolm >> 10; + if (tolmk >= tomk) { + /* The PCI hole does does not overlap the memory. */ + tolmk = tomk; + } + + /* Report the memory regions. */ + idx = 10; + ram_resource(dev, idx++, 0, 640); + ram_resource(dev, idx++, 768, tolmk - 768); #if CONFIG_WRITE_HIGH_TABLES==1 - /* Leave some space for ACPI, PIRQ and MP tables */ - high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024; - high_tables_size = HIGH_TABLES_SIZE * 1024; + /* Leave some space for ACPI, PIRQ and MP tables */ + high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024; + high_tables_size = HIGH_TABLES_SIZE * 1024; #endif - } assign_resources(dev->link_list); } -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
