Author: myles Date: Wed Jul 7 17:09:09 2010 New Revision: 5656 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5656
Log: Kill a few more warnings. Signed-off-by: Myles Watson <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/mainboard/intel/d810e2cb/Kconfig trunk/src/mainboard/kontron/986lcd-m/mptable.c trunk/src/northbridge/intel/i82810/raminit.c trunk/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c trunk/src/southbridge/intel/i82801bx/i82801bx_reset.c trunk/src/southbridge/intel/i82801bx/i82801bx_smbus.h trunk/src/southbridge/intel/i82801bx/i82801bx_watchdog.c Modified: trunk/src/mainboard/intel/d810e2cb/Kconfig ============================================================================== --- trunk/src/mainboard/intel/d810e2cb/Kconfig Tue Jul 6 23:40:11 2010 (r5655) +++ trunk/src/mainboard/intel/d810e2cb/Kconfig Wed Jul 7 17:09:09 2010 (r5656) @@ -25,6 +25,8 @@ select SOUTHBRIDGE_INTEL_I82801BX select SUPERIO_SMSC_SMSCSUPERIO select HAVE_PIRQ_TABLE + select HAVE_HARD_RESET + select USE_WATCHDOG_ON_BOOT select UDELAY_TSC select BOARD_ROMSIZE_KB_512 select HAVE_MAINBOARD_RESOURCES Modified: trunk/src/mainboard/kontron/986lcd-m/mptable.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/mptable.c Tue Jul 6 23:40:11 2010 (r5655) +++ trunk/src/mainboard/kontron/986lcd-m/mptable.c Wed Jul 7 17:09:09 2010 (r5656) @@ -32,7 +32,6 @@ static const char productid[12] = "986LCD-M "; struct mp_config_table *mc; struct device *riser = NULL, *firewire = NULL; - int i; int firewire_bus = 0, riser_bus = 0, isa_bus; int ioapic_id; Modified: trunk/src/northbridge/intel/i82810/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i82810/raminit.c Tue Jul 6 23:40:11 2010 (r5655) +++ trunk/src/northbridge/intel/i82810/raminit.c Wed Jul 7 17:09:09 2010 (r5656) @@ -365,7 +365,7 @@ static void sdram_set_registers(void) { u8 reg8; - u16 reg16, did; + u16 did; did = pci_read_config16(PCI_DEV(0, 0, 0), PCI_DEVICE_ID); Modified: trunk/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c ============================================================================== --- trunk/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c Tue Jul 6 23:40:11 2010 (r5655) +++ trunk/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c Wed Jul 7 17:09:09 2010 (r5656) @@ -65,17 +65,3 @@ { return do_smbus_read_byte(device, address); } - -static void smbus_write_byte(unsigned device, unsigned address, - unsigned char val) -{ - print_err("Unimplemented smbus_write_byte() called\n"); - return; -} - -static inline int smbus_write_block(unsigned device, unsigned length, - unsigned cmd, unsigned data1, - unsigned data2) -{ - return do_smbus_write_block(device, length, cmd, data1, data2); -} Modified: trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c Tue Jul 6 23:40:11 2010 (r5655) +++ trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c Wed Jul 7 17:09:09 2010 (r5656) @@ -72,7 +72,7 @@ * specific IRQ values in your mainboards Config.lb. */ -void i82801bx_enable_apic(struct device *dev) +static void i82801bx_enable_apic(struct device *dev) { uint32_t reg32; volatile uint32_t *ioapic_index = (volatile uint32_t *)0xfec00000; @@ -106,7 +106,7 @@ *ioapic_data = 1; /* Use Processor System Bus to deliver interrupts. */ } -void i82801bx_enable_serial_irqs(struct device *dev) +static void i82801bx_enable_serial_irqs(struct device *dev) { /* Set packet length and toggle silent mode bit. */ pci_write_config8(dev, SERIRQ_CNTL, @@ -211,7 +211,7 @@ pci_write_config8(dev, GPIO_CNTL, 0x10); } -void i82801bx_rtc_init(struct device *dev) +static void i82801bx_rtc_init(struct device *dev) { uint8_t reg8; uint32_t reg32; @@ -231,7 +231,7 @@ pci_write_config8(dev, RTC_CONF, 0x04); } -void i82801bx_lpc_route_dma(struct device *dev, uint8_t mask) +static void i82801bx_lpc_route_dma(struct device *dev, uint8_t mask) { uint16_t reg16; int i; Modified: trunk/src/southbridge/intel/i82801bx/i82801bx_reset.c ============================================================================== --- trunk/src/southbridge/intel/i82801bx/i82801bx_reset.c Tue Jul 6 23:40:11 2010 (r5655) +++ trunk/src/southbridge/intel/i82801bx/i82801bx_reset.c Wed Jul 7 17:09:09 2010 (r5656) @@ -19,6 +19,7 @@ */ #include <arch/io.h> +#include <reset.h> void hard_reset(void) { Modified: trunk/src/southbridge/intel/i82801bx/i82801bx_smbus.h ============================================================================== --- trunk/src/southbridge/intel/i82801bx/i82801bx_smbus.h Tue Jul 6 23:40:11 2010 (r5655) +++ trunk/src/southbridge/intel/i82801bx/i82801bx_smbus.h Wed Jul 7 17:09:09 2010 (r5656) @@ -110,74 +110,3 @@ return byte; } -/* This function is neither used nor tested by me (Corey Osgood), the author -(Yinghai) probably tested/used it on i82801er */ -static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd, - unsigned data1, unsigned data2) -{ -#warning "do_smbus_write_block is commented out" - print_err("Untested smbus_write_block called\n"); -#if 0 - unsigned char global_control_register; - unsigned char global_status_register; - unsigned char byte; - unsigned char stat; - int i; - - /* Clear the PM timeout flags, SECOND_TO_STS */ - outw(inw(0x0400 + 0x66), 0x0400 + 0x66); - - if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) { - return -2; - } - - /* Setup transaction */ - /* Obtain ownership */ - outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); - for (stat = 0; (stat & 0x40) == 0;) { - stat = inb(SMBUS_IO_BASE + SMBHSTSTAT); - } - /* Clear the done bit */ - outb(0x80, SMBUS_IO_BASE + SMBHSTSTAT); - /* Disable interrupts */ - outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL); - - /* Set the device I'm talking too */ - outb(((device & 0x7f) << 1), SMBUS_IO_BASE + SMBXMITADD); - - /* Set the command address */ - outb(cmd & 0xff, SMBUS_IO_BASE + SMBHSTCMD); - - /* Set the block length */ - outb(length & 0xff, SMBUS_IO_BASE + SMBHSTDAT0); - - /* Try sending out the first byte of data here */ - byte = (data1 >> (0)) & 0x0ff; - outb(byte, SMBUS_IO_BASE + SMBBLKDAT); - /* Issue a block write command */ - outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xe3) | (0x5 << 2) | 0x40, - SMBUS_IO_BASE + SMBHSTCTL); - - for (i = 0; i < length; i++) { - - /* Poll for transaction completion */ - if (smbus_wait_until_blk_done(SMBUS_IO_BASE) < 0) { - return -3; - } - - /* Load the next byte */ - if (i > 3) - byte = (data2 >> (i % 4)) & 0x0ff; - else - byte = (data1 >> (i)) & 0x0ff; - outb(byte, SMBUS_IO_BASE + SMBBLKDAT); - - /* Clear the done bit */ - outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), - SMBUS_IO_BASE + SMBHSTSTAT); - } - - print_debug("SMBUS Block complete\n"); - return 0; -#endif -} Modified: trunk/src/southbridge/intel/i82801bx/i82801bx_watchdog.c ============================================================================== --- trunk/src/southbridge/intel/i82801bx/i82801bx_watchdog.c Tue Jul 6 23:40:11 2010 (r5655) +++ trunk/src/southbridge/intel/i82801bx/i82801bx_watchdog.c Wed Jul 7 17:09:09 2010 (r5656) @@ -22,6 +22,7 @@ #include <arch/io.h> #include <device/device.h> #include <device/pci.h> +#include <watchdog.h> /* TODO: I'm fairly sure the same functionality is provided elsewhere. */ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
