Author: zbao Date: Thu Aug 5 08:12:16 2010 New Revision: 5684 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5684
Log: The number of cores is got by reading the bit 15,13,12 of [0,24,3,e8]. The bit 15 seems to be a new feature when CPU started to have more than 4 cores. Zheng Yes, this was add for revD. Marc Jones Signed-off-by: Zheng Bao <[email protected]> Acked-by: Marc Jones <[email protected]> Modified: trunk/src/northbridge/amd/amdht/h3ncmn.c Modified: trunk/src/northbridge/amd/amdht/h3ncmn.c ============================================================================== --- trunk/src/northbridge/amd/amdht/h3ncmn.c Wed Aug 4 21:29:11 2010 (r5683) +++ trunk/src/northbridge/amd/amdht/h3ncmn.c Thu Aug 5 08:12:16 2010 (r5684) @@ -555,16 +555,17 @@ u8 i; ASSERT((node < nb->maxNodes)); - /* Read CmpCap */ + /* Read CmpCap [2][1:0] */ AmdPCIReadBits(MAKE_SBDFO(makePCISegmentFromNode(node), makePCIBusFromNode(node), makePCIDeviceFromNode(node), CPU_NB_FUNC_03, REG_NB_CAPABILITY_3XE8), - 13, 12, &temp); + 15, 12, &temp); + /* bits[15,13,12] specify the cores */ /* Support Downcoring */ - cores = temp + 1; + cores = ((temp & 8) >> 1) + (temp & 3) + 1; AmdPCIReadBits (MAKE_SBDFO(makePCISegmentFromNode(node), makePCIBusFromNode(node), makePCIDeviceFromNode(node), -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
