Author: stepan Date: Thu Aug 26 14:43:58 2010 New Revision: 5742 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5742
Log: One of my boards needs this mini delay in order to survive ram initialization. Odd. The others don't. Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/northbridge/intel/i945/raminit.c Modified: trunk/src/northbridge/intel/i945/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i945/raminit.c Thu Aug 26 14:42:43 2010 (r5741) +++ trunk/src/northbridge/intel/i945/raminit.c Thu Aug 26 14:43:58 2010 (r5742) @@ -62,6 +62,8 @@ MCHBAR32(DCC) = reg32; /* This is the actual magic */ PRINTK_DEBUG("...done\n"); + + udelay(1); } static void ram_read32(u32 offset) -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
