On Mon, Sep 6, 2010 at 8:37 AM, Kevin O'Connor <[email protected]> wrote: > Instead of requiring users to modify qemu to allow writes to > 0xc0000-0xfffff, have coreboot qemu support enable the memory range at > startup. > > Signed-off-by: Kevin O'Connor <[email protected]>
Should we add a northbridge? It seems too bad to put northbridge code in the mainboard. I like the idea though. Acked-by: Myles Watson <[email protected]> Thanks, Myles > src/mainboard/emulation/qemu-x86/mainboard.c | 41 > +++++++++++++++++++++----- > 1 files changed, 33 insertions(+), 8 deletions(-) > > diff --git a/src/mainboard/emulation/qemu-x86/mainboard.c > b/src/mainboard/emulation/qemu-x86/mainboard.c > index 7ab02d9..55fc5c3 100644 > --- a/src/mainboard/emulation/qemu-x86/mainboard.c > +++ b/src/mainboard/emulation/qemu-x86/mainboard.c > @@ -10,15 +10,15 @@ > /* not sure how these are routed in qemu */ > static const unsigned char enetIrqs[4] = { 11, 0, 0, 0 }; > > -static void qemu_init(device_t dev) > +static void qemu_nb_init(device_t dev) > { > - /* The VGA OPROM already lives at 0xc0000, > - * force coreboot to use it. > - */ > - dev->on_mainboard = 1; > - > - /* Now do the usual initialization */ > - pci_dev_init(dev); > + // Map memory at 0xc0000 - 0xfffff > + int i; > + uint8_t v = pci_read_config8(dev, 0x59); > + v |= 0x30; > + pci_write_config8(dev, 0x59, v); > + for (i=0; i<6; i++) > + pci_write_config8(dev, 0x5a + i, 0x33); > > /* This sneaked in here, because Qemu does not > * emulate a SuperIO chip > @@ -32,6 +32,31 @@ static void qemu_init(device_t dev) > pci_assign_irqs(0, 3, enetIrqs); > } > > +static struct device_operations nb_operations = { > + .read_resources = pci_dev_read_resources, > + .set_resources = pci_dev_set_resources, > + .enable_resources = pci_dev_enable_resources, > + .init = qemu_nb_init, > + .ops_pci = 0, > +}; > + > +static const struct pci_driver nb_driver __pci_driver = { > + .ops = &nb_operations, > + .vendor = 0x8086, > + .device = 0x1237, > +}; > + > +static void qemu_init(device_t dev) > +{ > + /* The VGA OPROM already lives at 0xc0000, > + * force coreboot to use it. > + */ > + dev->on_mainboard = 1; > + > + /* Now do the usual initialization */ > + pci_dev_init(dev); > +} > + > static struct device_operations vga_operations = { > .read_resources = pci_dev_read_resources, > .set_resources = pci_dev_set_resources, > -- > 1.7.2.2 > > > -- > coreboot mailing list: [email protected] > http://www.coreboot.org/mailman/listinfo/coreboot > -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
