Author: oxygene Date: Tue Sep 7 09:53:26 2010 New Revision: 5780 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5780
Log: 2ms is enough time to accurately obtain the clock rate. Signed-off-by: Kevin O'Connor <[email protected]> Acked-by: Patrick Georgi <[email protected]> Modified: trunk/src/cpu/x86/tsc/delay_tsc.c Modified: trunk/src/cpu/x86/tsc/delay_tsc.c ============================================================================== --- trunk/src/cpu/x86/tsc/delay_tsc.c Tue Sep 7 09:43:10 2010 (r5779) +++ trunk/src/cpu/x86/tsc/delay_tsc.c Tue Sep 7 09:53:26 2010 (r5780) @@ -18,8 +18,8 @@ * device. */ -#define CALIBRATE_INTERVAL ((20*CLOCK_TICK_RATE)/1000) /* 20ms */ -#define CALIBRATE_DIVISOR (20*1000) /* 20ms / 20000 == 1usec */ +#define CALIBRATE_INTERVAL ((2*CLOCK_TICK_RATE)/1000) /* 2ms */ +#define CALIBRATE_DIVISOR (2*1000) /* 2ms / 2000 == 1usec */ static unsigned long long calibrate_tsc(void) { -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
