Author: stepan
Date: Thu Sep 23 20:29:40 2010
New Revision: 5829
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5829

Log:
Fix some wrong capitalizations, reformat comments, fix a typo.

Signed-off-by: Stefan Reinauer <[email protected]>
Acked-by: Stefan Reinauer <[email protected]>

Modified:
   trunk/src/boot/selfboot.c
   trunk/src/console/Kconfig
   trunk/src/include/device/resource.h
   trunk/src/lib/lzma.c
   trunk/src/mainboard/via/epia-n/acpi/irq_links.asl
   trunk/src/mainboard/via/epia-n/acpi/pata_methods.asl

Modified: trunk/src/boot/selfboot.c
==============================================================================
--- trunk/src/boot/selfboot.c   Thu Sep 23 20:16:46 2010        (r5828)
+++ trunk/src/boot/selfboot.c   Thu Sep 23 20:29:40 2010        (r5829)
@@ -175,7 +175,7 @@
                        break;
                }
                if ((mtype == LB_MEM_TABLE) && (start < mend) && (end > 
mstart)) {
-                       printk(BIOS_ERR, "Payload is overwriting Coreboot 
tables.\n");
+                       printk(BIOS_ERR, "Payload is overwriting coreboot 
tables.\n");
                        break;
                }
        }

Modified: trunk/src/console/Kconfig
==============================================================================
--- trunk/src/console/Kconfig   Thu Sep 23 20:16:46 2010        (r5828)
+++ trunk/src/console/Kconfig   Thu Sep 23 20:29:40 2010        (r5829)
@@ -156,10 +156,10 @@
 
 config CONSOLE_NE2K_SRC_IP
        depends on CONSOLE_NE2K
-       string "IP adress of Coreboot system"
+       string "IP address of coreboot system"
        default "10.0.1.253"
        help
-         This is the IP of the Coreboot system
+         This is the IP of the coreboot system
 
 config CONSOLE_NE2K_IO_PORT
        depends on CONSOLE_NE2K

Modified: trunk/src/include/device/resource.h
==============================================================================
--- trunk/src/include/device/resource.h Thu Sep 23 20:16:46 2010        (r5828)
+++ trunk/src/include/device/resource.h Thu Sep 23 20:29:40 2010        (r5829)
@@ -20,7 +20,7 @@
                                                 * to the bus below.
                                                 */
 #define IORESOURCE_BRIDGE      0x00080000      /* The IO resource has a bus 
below it. */
-#define IORESOURCE_RESERVE     0x10000000      /* The resource needs to be 
reserved in the Coreboot table */
+#define IORESOURCE_RESERVE     0x10000000      /* The resource needs to be 
reserved in the coreboot table */
 #define IORESOURCE_STORED      0x20000000      /* The IO resource assignment 
has been stored in the device */
 #define IORESOURCE_ASSIGNED    0x40000000      /* An IO resource that has been 
assigned a value */
 #define IORESOURCE_FIXED       0x80000000      /* An IO resource the allocator 
must not change */

Modified: trunk/src/lib/lzma.c
==============================================================================
--- trunk/src/lib/lzma.c        Thu Sep 23 20:16:46 2010        (r5828)
+++ trunk/src/lib/lzma.c        Thu Sep 23 20:29:40 2010        (r5829)
@@ -1,14 +1,13 @@
 /*
-
-Coreboot interface to memory-saving variant of LZMA decoder
-
-(C)opyright 2006 Carl-Daniel Hailfinger
-Released under the GNU GPL v2 or later
-
-Parts of this file are based on C/7zip/Compress/LZMA_C/LzmaTest.c from the LZMA
-SDK 4.42, which is written and distributed to public domain by Igor Pavlov.
-
-*/
+ * coreboot interface to memory-saving variant of LZMA decoder
+ *
+ * Copyright (C) 2006 Carl-Daniel Hailfinger
+ * Released under the GNU GPL v2 or later
+ *
+ * Parts of this file are based on C/7zip/Compress/LZMA_C/LzmaTest.c from the 
LZMA
+ * SDK 4.42, which is written and distributed to public domain by Igor Pavlov.
+ *
+ */
 
 #include "lzmadecode.c"
 #include <console/console.h>

Modified: trunk/src/mainboard/via/epia-n/acpi/irq_links.asl
==============================================================================
--- trunk/src/mainboard/via/epia-n/acpi/irq_links.asl   Thu Sep 23 20:16:46 
2010        (r5828)
+++ trunk/src/mainboard/via/epia-n/acpi/irq_links.asl   Thu Sep 23 20:29:40 
2010        (r5829)
@@ -16,7 +16,7 @@
         /* Status - always return ready */
         Method (_STA, 0, NotSerialized)
         {
-               /* See If Coreboot has allocated INTA# */
+               /* See if coreboot has allocated INTA# */
                And (PIRA, 0xF0, Local0)
                If (LEqual (Local0, 0x00))
                {
@@ -94,7 +94,7 @@
         Name (_UID, 0x02)
         Method (_STA, 0, NotSerialized)
         {
-               /* See If Coreboot has allocated INTB# */
+               /* See if coreboot has allocated INTB# */
                And (PIBC, 0x0F, Local0)
                If (LEqual (Local0, 0x00))
                {
@@ -172,7 +172,7 @@
         Name (_UID, 0x03)
         Method (_STA, 0, NotSerialized)
         {
-               /* See If Coreboot has allocated INTC# */
+               /* See if coreboot has allocated INTC# */
                And (PIBC, 0xF0, Local0)
                If (LEqual (Local0, 0x00))
                {
@@ -251,7 +251,7 @@
         Name (_UID, 0x04)
         Method (_STA, 0, NotSerialized)
         {
-               /* See If Coreboot has allocated INTD# */
+               /* See if coreboot has allocated INTD# */
                And (PIRD, 0xF0, Local0)
                If (LEqual (Local0, 0x00))
                {

Modified: trunk/src/mainboard/via/epia-n/acpi/pata_methods.asl
==============================================================================
--- trunk/src/mainboard/via/epia-n/acpi/pata_methods.asl        Thu Sep 23 
20:16:46 2010        (r5828)
+++ trunk/src/mainboard/via/epia-n/acpi/pata_methods.asl        Thu Sep 23 
20:29:40 2010        (r5829)
@@ -47,13 +47,14 @@
 })
 
 
-/* This method sets up the PATA Timing Control*/
-/* Note that a lot of this is done in the     */
-/* Coreboot VT8237R Init code, but this is    */
-/* already getting very cluttered with board  */
-/* specific code. Using ACPI will allow this  */
-/* to be de-cluttered a bit (so long as we're */
-/* running a ACPI Capable OS !!!)             */
+/* This method sets up the PATA Timing Control.
+ * Note that a lot of this is done in the
+ * coreboot VT8237R init code, but this is
+ * already getting very cluttered with board
+ * specific code. Using ACPI will allow this
+ * to be de-cluttered a bit (so long as we're
+ * running a ACPI capable OS!)
+ */
 
 Method (PMEX, 0, Serialized)
 {

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