Author: stepan Date: Sat Sep 25 12:42:55 2010 New Revision: 5839 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5839
Log: Keep the mc146818rtc.h include close to the option table include where possible. Signed-off-by: Myles Watson <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/src/mainboard/dell/s1850/romstage.c trunk/src/mainboard/intel/jarrell/romstage.c trunk/src/mainboard/supermicro/x6dai_g/romstage.c trunk/src/mainboard/supermicro/x6dhe_g/romstage.c trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c trunk/src/northbridge/intel/e7520/raminit.c trunk/src/northbridge/intel/e7525/raminit.c Modified: trunk/src/mainboard/dell/s1850/romstage.c ============================================================================== --- trunk/src/mainboard/dell/s1850/romstage.c Sat Sep 25 12:40:47 2010 (r5838) +++ trunk/src/mainboard/dell/s1850/romstage.c Sat Sep 25 12:42:55 2010 (r5839) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Modified: trunk/src/mainboard/intel/jarrell/romstage.c ============================================================================== --- trunk/src/mainboard/intel/jarrell/romstage.c Sat Sep 25 12:40:47 2010 (r5838) +++ trunk/src/mainboard/intel/jarrell/romstage.c Sat Sep 25 12:42:55 2010 (r5839) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Modified: trunk/src/mainboard/supermicro/x6dai_g/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dai_g/romstage.c Sat Sep 25 12:40:47 2010 (r5838) +++ trunk/src/mainboard/supermicro/x6dai_g/romstage.c Sat Sep 25 12:42:55 2010 (r5839) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "pc80/udelay_io.c" Modified: trunk/src/mainboard/supermicro/x6dhe_g/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g/romstage.c Sat Sep 25 12:40:47 2010 (r5838) +++ trunk/src/mainboard/supermicro/x6dhe_g/romstage.c Sat Sep 25 12:42:55 2010 (r5839) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "pc80/udelay_io.c" Modified: trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c Sat Sep 25 12:40:47 2010 (r5838) +++ trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c Sat Sep 25 12:42:55 2010 (r5839) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Modified: trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c Sat Sep 25 12:40:47 2010 (r5838) +++ trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c Sat Sep 25 12:42:55 2010 (r5839) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Sat Sep 25 12:40:47 2010 (r5838) +++ trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Sat Sep 25 12:42:55 2010 (r5839) @@ -5,7 +5,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <stdlib.h> -#include <pc80/mc146818rtc.h> #include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Modified: trunk/src/northbridge/intel/e7520/raminit.c ============================================================================== --- trunk/src/northbridge/intel/e7520/raminit.c Sat Sep 25 12:40:47 2010 (r5838) +++ trunk/src/northbridge/intel/e7520/raminit.c Sat Sep 25 12:42:55 2010 (r5839) @@ -23,6 +23,7 @@ #include <stdlib.h> #include "raminit.h" #include "e7520.h" +#include <pc80/mc146818rtc.h> #if CONFIG_HAVE_OPTION_TABLE #include "option_table.h" #endif @@ -626,7 +627,7 @@ if (read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) { ecc = 0; /* ECC off in CMOS so disable it */ print_debug("ECC off\n"); - } else + } else #endif { print_debug("ECC on\n"); Modified: trunk/src/northbridge/intel/e7525/raminit.c ============================================================================== --- trunk/src/northbridge/intel/e7525/raminit.c Sat Sep 25 12:40:47 2010 (r5838) +++ trunk/src/northbridge/intel/e7525/raminit.c Sat Sep 25 12:42:55 2010 (r5839) @@ -23,6 +23,7 @@ #include <stdlib.h> #include "raminit.h" #include "e7525.h" +#include <pc80/mc146818rtc.h> #if CONFIG_HAVE_OPTION_TABLE #include "option_table.h" #endif -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
