This patch needs to be tested on the following board for complete coverage: * bcom/winnetp680 * jetway/j7f24 * via/epia-m700 * via/epia-cn * via/pc2500e (patrickg?)
Thanks, wt 8<------------------------------------------------------ This change is somewhat dangerous as it enables CAR for some boards that it was not enabled for before. Signed-off-by: Warren Turkal <[email protected]> --- src/cpu/via/model_c7/Kconfig | 8 +++++++- src/mainboard/via/vt8454c/Kconfig | 1 - 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/cpu/via/model_c7/Kconfig b/src/cpu/via/model_c7/Kconfig index 57fe4e9..8e6f0e8 100644 --- a/src/cpu/via/model_c7/Kconfig +++ b/src/cpu/via/model_c7/Kconfig @@ -1,8 +1,14 @@ config CPU_VIA_C7 bool + +if CPU_VIA_C7 + +config CPU_SPECFIC_OPTIONS + def_bool y select UDELAY_TSC select MMX select SSE2 + select CACHE_AS_RAM config DCACHE_RAM_BASE hex @@ -14,4 +20,4 @@ config DCACHE_RAM_SIZE default 0x8000 depends on CPU_VIA_C7 - +endif # CPU_VIA_C7 diff --git a/src/mainboard/via/vt8454c/Kconfig b/src/mainboard/via/vt8454c/Kconfig index 1e882eb..6c08007 100644 --- a/src/mainboard/via/vt8454c/Kconfig +++ b/src/mainboard/via/vt8454c/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_HARD_RESET select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_512 - select CACHE_AS_RAM select TINY_BOOTBLOCK config MAINBOARD_DIR -- 1.7.1 -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
