On 29.09.2010 01:32, Peter Stuge wrote: > Carl-Daniel Hailfinger wrote: > >>> flashrom takes slighly more time due to various calibration >>> routines (I could not find a way to disable those, but I didn't >>> try very hard), >>> >> If you already have a known-good delay function with microsecond >> precision, you could use that instead of waiting for flashrom to >> calibrate its own delay loop. >> > > I'd suggest a setting which makes flashrom skip all parallel flash > chips, to remove any need for calibration. >
That would break some Winbond LPC flash chips which require a few milliseconds of delay between JEDEC toggle reads on erase. And we also noticed that some SPI chips will react badly (corruption) to a too tight RDSR instruction schedule. flashrom on libpayload uses the libpayload-provided delay functions and skips calibration. Given that LPC/FWH/SPI flash chips usually tolerate longer than expected delays without problem, you could hook up programmer_delay to udelay and save a second or so for calibration if you don't need parallel flash. > (To be more precise, the deciding factor is whether the chip is on > the local bus, or if there are some bus master(s) in between, but > that's generally equivalent to parallel vs. all others.) > Network cards with parallel flash would be classified as "local bus"? Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
