Author: oxygene Date: Fri Oct 1 16:50:12 2010 New Revision: 5898 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5898
Log: Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig, rename it slightly, make it visible only on relevant northbridges, drop it entirely from via boards (as they seem to have picked it up from AMD code without using it themselves), and make it default to false for all boards. Some romstages used to set this to "true" (ie. "print debug output"), but I didn't follow up on it in Kconfig - if you need it to debug CAR, enable it yourself. Signed-off-by: Patrick Georgi <[email protected]> Acked-by: Peter Stuge <[email protected]> Modified: trunk/src/Kconfig trunk/src/mainboard/amd/mahogany_fam10/romstage.c trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c trunk/src/mainboard/amd/serengeti_cheetah/romstage.c trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c trunk/src/mainboard/amd/tilapia_fam10/romstage.c trunk/src/mainboard/asus/a8v-e_se/romstage.c trunk/src/mainboard/asus/m2v-mx_se/romstage.c trunk/src/mainboard/asus/m4a785-m/romstage.c trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c trunk/src/mainboard/gigabyte/ma785gmt/romstage.c trunk/src/mainboard/gigabyte/ma78gm/romstage.c trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c trunk/src/mainboard/iwill/dk8_htx/romstage.c trunk/src/mainboard/iwill/dk8s2/romstage.c trunk/src/mainboard/iwill/dk8x/romstage.c trunk/src/mainboard/jetway/pa78vm5/romstage.c trunk/src/mainboard/msi/ms7260/ap_romstage.c trunk/src/mainboard/msi/ms7260/romstage.c trunk/src/mainboard/msi/ms9185/romstage.c trunk/src/mainboard/msi/ms9282/romstage.c trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c trunk/src/mainboard/supermicro/h8dme/ap_romstage.c trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c trunk/src/mainboard/tyan/s2912/ap_romstage.c trunk/src/mainboard/via/epia-m700/romstage.c trunk/src/northbridge/amd/amdfam10/Kconfig trunk/src/northbridge/amd/amdfam10/debug.c trunk/src/northbridge/amd/amdk8/Kconfig trunk/src/northbridge/amd/amdk8/debug.c trunk/src/northbridge/via/vx800/examples/romstage.c Modified: trunk/src/Kconfig ============================================================================== --- trunk/src/Kconfig Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/Kconfig Fri Oct 1 16:50:12 2010 (r5898) @@ -499,6 +499,16 @@ If unsure, say N. +config HAVE_DEBUG_CAR + def_bool n + +config DEBUG_CAR + bool "Output verbose Cache-as-RAM debug messages" + default n + depends on HAVE_DEBUG_CAR + help + This option enables additional CAR related debug messages. + config DEBUG_PIRQ bool "Check PIRQ table consistency" default n Modified: trunk/src/mainboard/amd/mahogany_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/amd/mahogany_fam10/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -2,7 +2,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/amd/serengeti_cheetah/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/amd/serengeti_cheetah/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -1,5 +1,4 @@ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/amd/tilapia_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/tilapia_fam10/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/amd/tilapia_fam10/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/asus/a8v-e_se/romstage.c ============================================================================== --- trunk/src/mainboard/asus/a8v-e_se/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/asus/a8v-e_se/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -24,8 +24,6 @@ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 - unsigned int get_sbdn(unsigned bus); /* Used by raminit. */ Modified: trunk/src/mainboard/asus/m2v-mx_se/romstage.c ============================================================================== --- trunk/src/mainboard/asus/m2v-mx_se/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/asus/m2v-mx_se/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -24,8 +24,6 @@ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 - unsigned int get_sbdn(unsigned bus); /* Used by raminit. */ Modified: trunk/src/mainboard/asus/m4a785-m/romstage.c ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/asus/m4a785-m/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -25,7 +25,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -23,7 +23,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/gigabyte/ma785gmt/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ma785gmt/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/gigabyte/ma785gmt/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/gigabyte/ma78gm/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ma78gm/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/gigabyte/ma78gm/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c ============================================================================== --- trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -22,7 +22,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/iwill/dk8_htx/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8_htx/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/iwill/dk8_htx/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -1,5 +1,4 @@ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/iwill/dk8s2/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8s2/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/iwill/dk8s2/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -1,5 +1,4 @@ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/iwill/dk8x/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8x/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/iwill/dk8x/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -1,5 +1,4 @@ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/jetway/pa78vm5/romstage.c ============================================================================== --- trunk/src/mainboard/jetway/pa78vm5/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/jetway/pa78vm5/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -23,7 +23,6 @@ //#define SYSTEM_TYPE 2 /* MOBILE */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 1 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/msi/ms7260/ap_romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7260/ap_romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/msi/ms7260/ap_romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -24,7 +24,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 /* Used by RAM init. */ #define QRANK_DIMM_SUPPORT 1 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 Modified: trunk/src/mainboard/msi/ms7260/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7260/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/msi/ms7260/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -20,7 +20,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -// #define CACHE_AS_RAM_ADDRESS_DEBUG 1 // #define RAM_TIMING_DEBUG 1 // #define DQS_TRAIN_DEBUG 1 // #define RES_DEBUG 1 Modified: trunk/src/mainboard/msi/ms9185/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9185/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/msi/ms9185/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -24,7 +24,6 @@ */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/msi/ms9282/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9282/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/msi/ms9282/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -23,7 +23,6 @@ */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -23,7 +23,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/supermicro/h8dme/ap_romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dme/ap_romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/supermicro/h8dme/ap_romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -23,7 +23,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -23,7 +23,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/tyan/s2912/ap_romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912/ap_romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/tyan/s2912/ap_romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -23,7 +23,6 @@ #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define SET_NB_CFG_54 1 Modified: trunk/src/mainboard/via/epia-m700/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-m700/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/mainboard/via/epia-m700/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -23,7 +23,6 @@ */ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #define PAYLOAD_IS_SEABIOS 0 #include <stdint.h> Modified: trunk/src/northbridge/amd/amdfam10/Kconfig ============================================================================== --- trunk/src/northbridge/amd/amdfam10/Kconfig Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/northbridge/amd/amdfam10/Kconfig Fri Oct 1 16:50:12 2010 (r5898) @@ -21,6 +21,7 @@ bool select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_SMBUS + select HAVE_DEBUG_CAR select HYPERTRANSPORT_PLUGIN_SUPPORT select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX select MMCONF_SUPPORT Modified: trunk/src/northbridge/amd/amdfam10/debug.c ============================================================================== --- trunk/src/northbridge/amd/amdfam10/debug.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/northbridge/amd/amdfam10/debug.c Fri Oct 1 16:50:12 2010 (r5898) @@ -26,7 +26,7 @@ static inline void print_debug_addr(const char *str, void *val) { -#if defined(CACHE_AS_RAM_ADDRESS_DEBUG) && CACHE_AS_RAM_ADDRESS_DEBUG == 1 +#if CONFIG_DEBUG_CAR printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val); #endif } Modified: trunk/src/northbridge/amd/amdk8/Kconfig ============================================================================== --- trunk/src/northbridge/amd/amdk8/Kconfig Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/northbridge/amd/amdk8/Kconfig Fri Oct 1 16:50:12 2010 (r5898) @@ -21,6 +21,7 @@ bool select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_SMBUS + select HAVE_DEBUG_CAR select HYPERTRANSPORT_PLUGIN_SUPPORT config AGP_APERTURE_SIZE Modified: trunk/src/northbridge/amd/amdk8/debug.c ============================================================================== --- trunk/src/northbridge/amd/amdk8/debug.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/northbridge/amd/amdk8/debug.c Fri Oct 1 16:50:12 2010 (r5898) @@ -3,13 +3,9 @@ * */ -#ifndef CACHE_AS_RAM_ADDRESS_DEBUG -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 -#endif - static inline void print_debug_addr(const char *str, void *val) { -#if CACHE_AS_RAM_ADDRESS_DEBUG == 1 +#if CONFIG_DEBUG_CAR printk(BIOS_DEBUG, "------Address debug: %s%x------\n", str, val); #endif } Modified: trunk/src/northbridge/via/vx800/examples/romstage.c ============================================================================== --- trunk/src/northbridge/via/vx800/examples/romstage.c Fri Oct 1 14:24:57 2010 (r5897) +++ trunk/src/northbridge/via/vx800/examples/romstage.c Fri Oct 1 16:50:12 2010 (r5898) @@ -21,7 +21,6 @@ #define ASSEMBLY 1 #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #include <stdint.h> #include <device/pci_def.h> -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
