Author: uwe Date: Tue Oct 12 01:22:24 2010 New Revision: 5940 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5940
Log: Fix typo after r5925. BTW, embed the always-the-same string instead of referencing it through "%s". Do the same for i82371EB while we're at it. Signed-off-by: Sylvain Hitier <[email protected]> Acked-by: Uwe Hermann <[email protected]> Modified: trunk/src/southbridge/intel/i82371eb/i82371eb_ide.c trunk/src/southbridge/intel/i82801ax/i82801ax_ide.c Modified: trunk/src/southbridge/intel/i82371eb/i82371eb_ide.c ============================================================================== --- trunk/src/southbridge/intel/i82371eb/i82371eb_ide.c Tue Oct 12 00:49:39 2010 (r5939) +++ trunk/src/southbridge/intel/i82371eb/i82371eb_ide.c Tue Oct 12 01:22:24 2010 (r5940) @@ -48,14 +48,14 @@ reg16 = pci_read_config16(dev, IDETIM_PRI); reg16 = ONOFF(conf->ide0_enable, reg16, IDE_DECODE_ENABLE); pci_write_config16(dev, IDETIM_PRI, reg16); - printk(BIOS_DEBUG, "IDE: %s: %s\n", "Primary IDE interface", + printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Primary", conf->ide0_enable ? "on" : "off"); /* Enable/disable the secondary IDE interface. */ reg16 = pci_read_config16(dev, IDETIM_SEC); reg16 = ONOFF(conf->ide1_enable, reg16, IDE_DECODE_ENABLE); pci_write_config16(dev, IDETIM_SEC, reg16); - printk(BIOS_DEBUG, "IDE: %s: %s\n", "Secondary IDE interface", + printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Secondary", conf->ide1_enable ? "on" : "off"); /* Enable access to the legacy IDE ports (both primary and secondary), Modified: trunk/src/southbridge/intel/i82801ax/i82801ax_ide.c ============================================================================== --- trunk/src/southbridge/intel/i82801ax/i82801ax_ide.c Tue Oct 12 00:49:39 2010 (r5939) +++ trunk/src/southbridge/intel/i82801ax/i82801ax_ide.c Tue Oct 12 01:22:24 2010 (r5940) @@ -38,7 +38,7 @@ reg16 &= ~IDE_DECODE_ENABLE; if (!conf || conf->ide0_enable) reg16 |= IDE_DECODE_ENABLE; - printk(BIOS_DEBUG, "IDE: %s: %s\n", "Primary IDE interface", + printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Primary", conf->ide0_enable ? "on" : "off"); pci_write_config16(dev, IDE_TIM_PRI, reg16); @@ -46,7 +46,7 @@ reg16 &= ~IDE_DECODE_ENABLE; if (!conf || conf->ide1_enable) reg16 |= IDE_DECODE_ENABLE; - printk(BIOS_DEBUG, "IDE: %s: %s\n", "Primary IDE interface", + printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Secondary", conf->ide0_enable ? "on" : "off"); pci_write_config16(dev, IDE_TIM_SEC, reg16); } -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
