On 14.10.2010, at 05:38, Joseph Smith <[email protected]> wrote: >> > Anyways why can't cpu specific features be implemented at the model level and > not at the socket level???
Because SSE, SSE2 and MMX are not CPU specific features in this context. SSE and MMX determine how many registrers are available for romcc. It describes the lowest common denominator between all CPUs in a socket. If one model selects SSE and another one does not, it will still be enabled, thus breaking every other CPU you can put in that socket. Maybe we should drop those flags from Kconfig completely and just set the right ROMCCFLAGS in the socket's makefile to remove any confusion about the meaning of thos flags. SSE2 is similar. However it triggers the use of optimized assembler instructions in ram testing. This one is less critical al most boards don't test the ram. Still we can not put the setting in the model. The reason models and sockets behave this way is that a mainboard selects a socket and the socket selects all models that fit into that socket. There is no other use for sockets than to gather models. Stefan > -- > Thanks, > Joseph Smith > Set-Top-Linux > www.settoplinux.org > > -- > coreboot mailing list: [email protected] > http://www.coreboot.org/mailman/listinfo/coreboot > -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
