Author: uwe Date: Sat Oct 16 10:45:31 2010 New Revision: 5954 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5954
Log: Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory. abuild-tested. I have no Deschutes CPUs to boot test this with. Signed-off-by: Keith Hui <[email protected]> Acked-by: Uwe Hermann <[email protected]> Added: trunk/src/cpu/intel/model_65x/ trunk/src/cpu/intel/model_65x/Kconfig trunk/src/cpu/intel/model_65x/Makefile.inc trunk/src/cpu/intel/model_65x/model_65x_init.c Modified: trunk/src/cpu/intel/slot_1/Makefile.inc Added: trunk/src/cpu/intel/model_65x/Kconfig ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_65x/Kconfig Sat Oct 16 10:45:31 2010 (r5954) @@ -0,0 +1,3 @@ +config CPU_INTEL_MODEL_65X + bool + select SMP Added: trunk/src/cpu/intel/model_65x/Makefile.inc ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_65x/Makefile.inc Sat Oct 16 10:45:31 2010 (r5954) @@ -0,0 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2010 Keith Hui <[email protected]> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +driver-y += model_65x_init.c + Added: trunk/src/cpu/intel/model_65x/model_65x_init.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_65x/model_65x_init.c Sat Oct 16 10:45:31 2010 (r5954) @@ -0,0 +1,79 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2010 Keith Hui <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <device/device.h> +#include <device/pci.h> +#include <cpu/cpu.h> +#include <cpu/x86/mtrr.h> +#include <cpu/x86/msr.h> +#include <cpu/x86/lapic.h> +#include <cpu/intel/microcode.h> +#include <cpu/x86/cache.h> + +static u32 microcode_updates[] = { + + /* Dummy terminator */ + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, +}; + +static void model_65x_init(device_t dev) +{ + /* Turn on caching if we haven't already */ + x86_enable_cache(); + x86_setup_mtrrs(36); + x86_mtrr_check(); + + /* Update the microcode */ + intel_update_microcode(microcode_updates); + + /* Enable the local cpu apics */ + setup_lapic(); +}; + +static struct device_operations cpu_dev_ops = { + .init = model_65x_init, +}; + +/* + * Intel Pentium II Processor Specification Update + * http://download.intel.com/design/PentiumII/specupdt/24333749.pdf + * + * Mobile Intel Pentium II Processor Specification Update + * http://download.intel.com/design/intarch/specupdt/24388757.pdf + * + * Intel Pentium II Xeon Processor Specification Update + * http://download.intel.com/support/processors/pentiumii/xeon/24377632.pdf + */ +static struct cpu_device_id cpu_table[] = { + { X86_VENDOR_INTEL, 0x0650 }, /* PII/Celeron, dA0/mdA0/A0 */ + { X86_VENDOR_INTEL, 0x0651 }, /* PII/Celeron, dA1/A1 */ + { X86_VENDOR_INTEL, 0x0652 }, /* PII/Celeron/Xeon, dB0/mdB0/B0 */ + { X86_VENDOR_INTEL, 0x0653 }, /* PII/Xeon, dB1/B1 */ + { 0, 0 }, +}; + +static const struct cpu_driver driver __cpu_driver = { + .ops = &cpu_dev_ops, + .id_table = cpu_table, +}; Modified: trunk/src/cpu/intel/slot_1/Makefile.inc ============================================================================== --- trunk/src/cpu/intel/slot_1/Makefile.inc Fri Oct 15 09:47:51 2010 (r5953) +++ trunk/src/cpu/intel/slot_1/Makefile.inc Sat Oct 16 10:45:31 2010 (r5954) @@ -20,6 +20,7 @@ ramstage-y += slot_1.c subdirs-y += ../model_6xx +subdirs-y += ../model_65x subdirs-y += ../model_67x subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
