This patch removes some unused code from gx2/raminit.c .

Signed-off-by: Nils Jacobs <[email protected]>

This is Abuild and boot tested.

Thanks, Nils.
Index: src/northbridge/amd/gx2/raminit.c
===================================================================
--- src/northbridge/amd/gx2/raminit.c	(revision 6011)
+++ src/northbridge/amd/gx2/raminit.c	(working copy)
@@ -455,12 +455,6 @@
 	msr.lo &= ~0xC0;
 	msr.lo |= 0x0;		/* set refresh to 4SDRAM clocks */
 	wrmsr(msrnum, msr);
-
-	/* Memory Interleave: Set HOI here otherwise default is LOI */
-	/* msrnum = MC_CF8F_DATA;
-	   msr = rdmsr(msrnum);
-	   msr.hi |= CF8F_UPPER_HOI_LOI_SET;
-	   wrmsr(msrnum, msr); */
 }
 
 static void sdram_set_spd_registers(const struct mem_controller *ctrl)
-- 
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot

Reply via email to