Author: oxygene Date: Mon Nov 15 20:44:42 2010 New Revision: 6074 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6074
Log: Move RCBA defines to northbridge (instead of mainboard) Signed-off-by: Patrick Georgi <[email protected]> Acked-by: Patrick Georgi <[email protected]> Modified: trunk/src/mainboard/intel/eagleheights/romstage.c trunk/src/northbridge/intel/i3100/i3100.h Modified: trunk/src/mainboard/intel/eagleheights/romstage.c ============================================================================== --- trunk/src/mainboard/intel/eagleheights/romstage.c Mon Nov 15 20:35:14 2010 (r6073) +++ trunk/src/mainboard/intel/eagleheights/romstage.c Mon Nov 15 20:44:42 2010 (r6074) @@ -39,6 +39,7 @@ #include "reset.c" #include "superio/intel/i3100/i3100_early_serial.c" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" +#include "northbridge/intel/i3100/i3100.h" #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) @@ -54,10 +55,6 @@ #define SATA_MODE_IDE 0x00 #define SATA_MODE_AHCI 0x01 -/* RCBA registers */ -#define RCBA 0xF0 -#define DEFAULT_RCBA 0xFEA00000 - #define RCBA_RPC 0x0224 /* 32 bit */ #define RCBA_TCTL 0x3000 /* 8 bit */ Modified: trunk/src/northbridge/intel/i3100/i3100.h ============================================================================== --- trunk/src/northbridge/intel/i3100/i3100.h Mon Nov 15 20:35:14 2010 (r6073) +++ trunk/src/northbridge/intel/i3100/i3100.h Mon Nov 15 20:44:42 2010 (r6074) @@ -64,6 +64,8 @@ #define DRC_NOECC_MODE (0 << 20) #define DRC_72BIT_ECC (1 << 20) +#define RCBA 0xF0 +#define DEFAULT_RCBA 0xFEA00000 #ifdef __GNUC__ int bios_reset_detected(void); -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
