Author: uwe Date: Wed Nov 17 00:15:37 2010 New Revision: 6080 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6080
Log: Drop W83627THF, it's the same device as W83627THG. The only difference is that the "G" version is in a Pb-free package, which is not relevant from a programmer's view. We keep W83627THG (and drop W83627THF) because: - The W83627THF had a CIR device / LDN which doesn't actually exist. - The W83627THF had no GPIO2, GPIO3 LDNs (were commented out). - The W83627THF didn't use the PNP_MSC0/1 which is needed/used by boards. This also fixes an issue on MSI MS7135's devicetree.cb: device pnp 4e.6 off end # XXX keep allocator happy The line above can be (and is) removed, as it was only needed due to the incorrect CIR LDN in the W83627THF. In the iwill/dk8x target: Drop incorrect LDNs 4 and 6, add 0xb. Signed-off-by: Uwe Hermann <[email protected]> Acked-by: Peter Stuge <[email protected]> Deleted: trunk/src/superio/winbond/w83627thf/ Modified: trunk/src/mainboard/iwill/dk8x/Kconfig trunk/src/mainboard/iwill/dk8x/devicetree.cb trunk/src/mainboard/lanner/em8510/Kconfig trunk/src/mainboard/lanner/em8510/devicetree.cb trunk/src/mainboard/lanner/em8510/romstage.c trunk/src/mainboard/msi/ms7135/Kconfig trunk/src/mainboard/msi/ms7135/devicetree.cb trunk/src/mainboard/msi/ms7135/romstage.c trunk/src/superio/winbond/Kconfig trunk/src/superio/winbond/Makefile.inc Modified: trunk/src/mainboard/iwill/dk8x/Kconfig ============================================================================== --- trunk/src/mainboard/iwill/dk8x/Kconfig Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/mainboard/iwill/dk8x/Kconfig Wed Nov 17 00:15:37 2010 (r6080) @@ -8,7 +8,7 @@ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_AMD_AMD8111 select SOUTHBRIDGE_AMD_AMD8131 - select SUPERIO_WINBOND_W83627THF + select SUPERIO_WINBOND_W83627THG select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_MP_TABLE Modified: trunk/src/mainboard/iwill/dk8x/devicetree.cb ============================================================================== --- trunk/src/mainboard/iwill/dk8x/devicetree.cb Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/mainboard/iwill/dk8x/devicetree.cb Wed Nov 17 00:15:37 2010 (r6080) @@ -25,18 +25,18 @@ device pci 1.0 off end end device pci 1.0 on - chip superio/winbond/w83627thf + # TODO: This is incomplete. + chip superio/winbond/w83627thg device pnp 2e.0 on end device pnp 2e.1 on end device pnp 2e.2 on end device pnp 2e.3 on end - device pnp 2e.4 on end device pnp 2e.5 on end - device pnp 2e.6 on end device pnp 2e.7 on end device pnp 2e.8 on end device pnp 2e.9 on end device pnp 2e.a on end + device pnp 2e.b on end end end device pci 1.1 on end Modified: trunk/src/mainboard/lanner/em8510/Kconfig ============================================================================== --- trunk/src/mainboard/lanner/em8510/Kconfig Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/mainboard/lanner/em8510/Kconfig Wed Nov 17 00:15:37 2010 (r6080) @@ -6,7 +6,7 @@ select CPU_INTEL_SOCKET_MPGA479M select NORTHBRIDGE_INTEL_I855 select SOUTHBRIDGE_INTEL_I82801DX - select SUPERIO_WINBOND_W83627THF + select SUPERIO_WINBOND_W83627THG select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select HAVE_HARD_RESET Modified: trunk/src/mainboard/lanner/em8510/devicetree.cb ============================================================================== --- trunk/src/mainboard/lanner/em8510/devicetree.cb Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/mainboard/lanner/em8510/devicetree.cb Wed Nov 17 00:15:37 2010 (r6080) @@ -13,7 +13,7 @@ register "enable_usb" = "0" register "enable_native_ide" = "0" device pci 1f.0 on - chip superio/winbond/w83627thf # link 1 + chip superio/winbond/w83627thg # link 1 device pnp 2e.0 on # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 @@ -37,7 +37,6 @@ irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off end # CIR device pnp 2e.7 off end # GAME_MIDI_GIPO1 device pnp 2e.8 off end # GPIO2 device pnp 2e.9 off end # GPIO3 Modified: trunk/src/mainboard/lanner/em8510/romstage.c ============================================================================== --- trunk/src/mainboard/lanner/em8510/romstage.c Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/mainboard/lanner/em8510/romstage.c Wed Nov 17 00:15:37 2010 (r6080) @@ -34,11 +34,11 @@ #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c" #include "northbridge/intel/i855/raminit.h" #include "northbridge/intel/i855/debug.c" -#include "superio/winbond/w83627thf/w83627thf_early_serial.c" +#include "superio/winbond/w83627thg/w83627thg_early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" -#define SERIAL_DEV PNP_DEV(0x2e, W83627THF_SP1) +#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1) static inline int spd_read_byte(unsigned device, unsigned address) { @@ -65,7 +65,7 @@ #endif } - w83627thf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); Modified: trunk/src/mainboard/msi/ms7135/Kconfig ============================================================================== --- trunk/src/mainboard/msi/ms7135/Kconfig Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/mainboard/msi/ms7135/Kconfig Wed Nov 17 00:15:37 2010 (r6080) @@ -7,7 +7,7 @@ select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_NVIDIA_CK804 - select SUPERIO_WINBOND_W83627THF + select SUPERIO_WINBOND_W83627THG select HAVE_BUS_CONFIG select HAVE_HARD_RESET select HAVE_OPTION_TABLE Modified: trunk/src/mainboard/msi/ms7135/devicetree.cb ============================================================================== --- trunk/src/mainboard/msi/ms7135/devicetree.cb Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/mainboard/msi/ms7135/devicetree.cb Wed Nov 17 00:15:37 2010 (r6080) @@ -11,7 +11,7 @@ chip southbridge/nvidia/ck804 # Southbridge device pci 0.0 on end # HT device pci 1.0 on # LPC - chip superio/winbond/w83627thf # Super I/O + chip superio/winbond/w83627thg # Super I/O device pnp 4e.0 on # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 @@ -30,14 +30,13 @@ io 0x60 = 0x2f8 irq 0x70 = 3 end - device pnp 4e.5 on # PS/2 keyboard + device pnp 4e.5 on # PS/2 keyboard & mouse io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 4e.6 off end # XXX keep allocator happy - device pnp 4e.7 off end # Game, MIDI, GPIO 1, GPIO 5 + device pnp 4e.7 off end # Game port, MIDI, GPIO 1 & 5 device pnp 4e.8 off end # GPIO 2 device pnp 4e.9 off end # GPIO 3, GPIO 4 device pnp 4e.a off end # ACPI Modified: trunk/src/mainboard/msi/ms7135/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7135/romstage.c Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/mainboard/msi/ms7135/romstage.c Wed Nov 17 00:15:37 2010 (r6080) @@ -22,7 +22,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define SERIAL_DEV PNP_DEV(0x4e, W83627THF_SP1) +#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1) #if CONFIG_LOGICAL_CPUS == 1 #define SET_NB_CFG_54 1 @@ -38,7 +38,7 @@ #include <pc80/mc146818rtc.h> #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/winbond/w83627thf/w83627thf_early_serial.c" +#include "superio/winbond/w83627thg/w83627thg_early_serial.c" #include <cpu/amd/model_fxx_rev.h> #include <console/console.h> @@ -123,7 +123,7 @@ bsp_apicid = init_cpus(cpu_init_detectedx); } - w83627thf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); Modified: trunk/src/superio/winbond/Kconfig ============================================================================== --- trunk/src/superio/winbond/Kconfig Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/superio/winbond/Kconfig Wed Nov 17 00:15:37 2010 (r6080) @@ -4,8 +4,6 @@ bool config SUPERIO_WINBOND_W83627HF bool -config SUPERIO_WINBOND_W83627THF - bool config SUPERIO_WINBOND_W83627THG bool config SUPERIO_WINBOND_W83627UHG Modified: trunk/src/superio/winbond/Makefile.inc ============================================================================== --- trunk/src/superio/winbond/Makefile.inc Tue Nov 16 23:15:09 2010 (r6079) +++ trunk/src/superio/winbond/Makefile.inc Wed Nov 17 00:15:37 2010 (r6080) @@ -1,7 +1,6 @@ subdirs-y += w83627dhg subdirs-y += w83627ehg subdirs-y += w83627hf -subdirs-y += w83627thf subdirs-y += w83627thg subdirs-y += w83627uhg subdirs-y += w83697hf -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
