Am 06.11.2010 05:32, schrieb Scott Duplichan:
> I am familiar with the recent history of this bit. It defaults to
> zero, resulting in the 'weird' local apic id numbering. BIOS is
> supposed to set it early to get the normal apic id numbering.
> While I do not know the origin of this strange bit, I do know
> it was scheduled for removal in future AMD processors. Unfortunately
> the removal plan was rejected. I would certainly get rid of
> SET_NB_CFG_54. Just let coreboot set this bit early so that there
> is no need to deal with two different local apic id formats.
This patch does away with SET_NB_CFG_54, keeping the code that was
selected by this option for all K8+ multicore CPUs.
Signed-off-by: Patrick Georgi <[email protected]>
Index: src/cpu/amd/dualcore/dualcore.c
===================================================================
--- src/cpu/amd/dualcore/dualcore.c (Revision 6084)
+++ src/cpu/amd/dualcore/dualcore.c (Arbeitskopie)
@@ -1,10 +1,5 @@
/* 2004.12 yhlu add dual core support */
-
-#ifndef SET_NB_CFG_54
- #define SET_NB_CFG_54 1
-#endif
-
#include "cpu/amd/dualcore/dualcore_id.c"
#include <pc80/mc146818rtc.h>
#if CONFIG_HAVE_OPTION_TABLE
@@ -20,7 +15,6 @@
return dword;
}
-#if SET_NB_CFG_54 == 1
static inline uint8_t set_apicid_cpuid_lo(void)
{
#if CONFIG_K8_REV_F_SUPPORT == 0
@@ -35,12 +29,7 @@
return 1;
}
-#else
-static inline void set_apicid_cpuid_lo(void) { }
-
-#endif
-
static inline void real_start_other_core(unsigned nodeid)
{
uint32_t dword;
Index: src/cpu/amd/quadcore/quadcore.c
===================================================================
--- src/cpu/amd/quadcore/quadcore.c (Revision 6084)
+++ src/cpu/amd/quadcore/quadcore.c (Arbeitskopie)
@@ -24,10 +24,6 @@
#include "option_table.h"
#endif
-#ifndef SET_NB_CFG_54
- #define SET_NB_CFG_54 1
-#endif
-
#include "cpu/amd/quadcore/quadcore_id.c"
static u32 get_core_num_in_bsp(u32 nodeid)
@@ -43,7 +39,6 @@
return dword;
}
-#if SET_NB_CFG_54 == 1
static u8 set_apicid_cpuid_lo(void)
{
// set the NB_CFG[54]=1; why the OS will be happy with that ???
@@ -54,13 +49,7 @@
return 1;
}
-#else
-static void set_apicid_cpuid_lo(void) { }
-
-#endif
-
-
static void real_start_other_core(u32 nodeid, u32 cores)
{
u32 dword, i;
Index: src/mainboard/iwill/dk8_htx/romstage.c
===================================================================
--- src/mainboard/iwill/dk8_htx/romstage.c (Revision 6084)
+++ src/mainboard/iwill/dk8_htx/romstage.c (Arbeitskopie)
@@ -1,5 +1,3 @@
-#define SET_NB_CFG_54 1
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/iwill/dk8s2/romstage.c
===================================================================
--- src/mainboard/iwill/dk8s2/romstage.c (Revision 6084)
+++ src/mainboard/iwill/dk8s2/romstage.c (Arbeitskopie)
@@ -1,5 +1,3 @@
-#define SET_NB_CFG_54 1
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/iwill/dk8x/romstage.c
===================================================================
--- src/mainboard/iwill/dk8x/romstage.c (Revision 6084)
+++ src/mainboard/iwill/dk8x/romstage.c (Arbeitskopie)
@@ -1,5 +1,3 @@
-#define SET_NB_CFG_54 1
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/asrock/939a785gmh/romstage.c
===================================================================
--- src/mainboard/asrock/939a785gmh/romstage.c (Revision 6084)
+++ src/mainboard/asrock/939a785gmh/romstage.c (Arbeitskopie)
@@ -18,10 +18,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#define RC0 (6<<8)
#define RC1 (7<<8)
Index: src/mainboard/broadcom/blast/romstage.c
===================================================================
--- src/mainboard/broadcom/blast/romstage.c (Revision 6084)
+++ src/mainboard/broadcom/blast/romstage.c (Arbeitskopie)
@@ -1,8 +1,3 @@
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/supermicro/h8dmr/ap_romstage.c
===================================================================
--- src/mainboard/supermicro/h8dmr/ap_romstage.c (Revision 6084)
+++ src/mainboard/supermicro/h8dmr/ap_romstage.c (Arbeitskopie)
@@ -22,8 +22,6 @@
#define ASSEMBLY 1
#define __PRE_RAM__
-#define SET_NB_CFG_54 1
-
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#include <stdint.h>
Index: src/mainboard/supermicro/h8dmr/romstage.c
===================================================================
--- src/mainboard/supermicro/h8dmr/romstage.c (Revision 6084)
+++ src/mainboard/supermicro/h8dmr/romstage.c (Arbeitskopie)
@@ -19,10 +19,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/supermicro/h8dme/ap_romstage.c
===================================================================
--- src/mainboard/supermicro/h8dme/ap_romstage.c (Revision 6084)
+++ src/mainboard/supermicro/h8dme/ap_romstage.c (Arbeitskopie)
@@ -22,8 +22,6 @@
#define ASSEMBLY 1
#define __PRE_RAM__
-#define SET_NB_CFG_54 1
-
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#include <stdint.h>
Index: src/mainboard/supermicro/h8dme/romstage.c
===================================================================
--- src/mainboard/supermicro/h8dme/romstage.c (Revision 6084)
+++ src/mainboard/supermicro/h8dme/romstage.c (Arbeitskopie)
@@ -16,10 +16,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/supermicro/h8dmr_fam10/romstage.c
===================================================================
--- src/mainboard/supermicro/h8dmr_fam10/romstage.c (Revision 6084)
+++ src/mainboard/supermicro/h8dmr_fam10/romstage.c (Arbeitskopie)
@@ -22,11 +22,6 @@
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 1
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/supermicro/h8qme_fam10/romstage.c
===================================================================
--- src/mainboard/supermicro/h8qme_fam10/romstage.c (Revision 6084)
+++ src/mainboard/supermicro/h8qme_fam10/romstage.c (Arbeitskopie)
@@ -22,11 +22,6 @@
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 1
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/kontron/kt690/romstage.c
===================================================================
--- src/mainboard/kontron/kt690/romstage.c (Revision 6084)
+++ src/mainboard/kontron/kt690/romstage.c (Arbeitskopie)
@@ -18,10 +18,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#define RC0 (6<<8)
#define RC1 (7<<8)
Index: src/mainboard/gigabyte/m57sli/ap_romstage.c
===================================================================
--- src/mainboard/gigabyte/m57sli/ap_romstage.c (Revision 6084)
+++ src/mainboard/gigabyte/m57sli/ap_romstage.c (Arbeitskopie)
@@ -22,8 +22,6 @@
#define ASSEMBLY 1
#define __PRE_RAM__
-#define SET_NB_CFG_54 1
-
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#include <stdint.h>
Index: src/mainboard/gigabyte/m57sli/romstage.c
===================================================================
--- src/mainboard/gigabyte/m57sli/romstage.c (Revision 6084)
+++ src/mainboard/gigabyte/m57sli/romstage.c (Arbeitskopie)
@@ -19,10 +19,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/gigabyte/ma78gm/romstage.c
===================================================================
--- src/mainboard/gigabyte/ma78gm/romstage.c (Revision 6084)
+++ src/mainboard/gigabyte/ma78gm/romstage.c (Arbeitskopie)
@@ -21,8 +21,6 @@
#define SYSTEM_TYPE 1 /* DESKTOP */
//#define SYSTEM_TYPE 2 /* MOBILE */
-#define SET_NB_CFG_54 1
-
//used by incoherent_ht
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 0
Index: src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
===================================================================
--- src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c (Revision 6084)
+++ src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c (Arbeitskopie)
@@ -24,8 +24,6 @@
#define ASSEMBLY 1
#define __PRE_RAM__
-#define SET_NB_CFG_54 1
-
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#include <stdint.h>
Index: src/mainboard/gigabyte/ga_2761gxdk/romstage.c
===================================================================
--- src/mainboard/gigabyte/ga_2761gxdk/romstage.c (Revision 6084)
+++ src/mainboard/gigabyte/ga_2761gxdk/romstage.c (Arbeitskopie)
@@ -21,10 +21,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/gigabyte/ma785gmt/romstage.c
===================================================================
--- src/mainboard/gigabyte/ma785gmt/romstage.c (Revision 6084)
+++ src/mainboard/gigabyte/ma785gmt/romstage.c (Arbeitskopie)
@@ -21,8 +21,6 @@
#define SYSTEM_TYPE 1 /* DESKTOP */
//#define SYSTEM_TYPE 2 /* MOBILE */
-#define SET_NB_CFG_54 1
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/amd/mahogany/romstage.c
===================================================================
--- src/mainboard/amd/mahogany/romstage.c (Revision 6084)
+++ src/mainboard/amd/mahogany/romstage.c (Arbeitskopie)
@@ -17,10 +17,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#define RC0 (6<<8)
#define RC1 (7<<8)
Index: src/mainboard/amd/pistachio/romstage.c
===================================================================
--- src/mainboard/amd/pistachio/romstage.c (Revision 6084)
+++ src/mainboard/amd/pistachio/romstage.c (Arbeitskopie)
@@ -17,10 +17,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#define DIMM0 0x50
#define DIMM1 0x51
Index: src/mainboard/amd/dbm690t/romstage.c
===================================================================
--- src/mainboard/amd/dbm690t/romstage.c (Revision 6084)
+++ src/mainboard/amd/dbm690t/romstage.c (Arbeitskopie)
@@ -17,10 +17,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#define RC0 (6<<8)
#define RC1 (7<<8)
Index: src/mainboard/amd/serengeti_cheetah/ap_romstage.c
===================================================================
--- src/mainboard/amd/serengeti_cheetah/ap_romstage.c (Revision 6084)
+++ src/mainboard/amd/serengeti_cheetah/ap_romstage.c (Arbeitskopie)
@@ -1,8 +1,6 @@
#define ASSEMBLY 1
#define __PRE_RAM__
-#define SET_NB_CFG_54 1
-
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#include <stdint.h>
Index: src/mainboard/amd/serengeti_cheetah/romstage.c
===================================================================
--- src/mainboard/amd/serengeti_cheetah/romstage.c (Revision 6084)
+++ src/mainboard/amd/serengeti_cheetah/romstage.c (Arbeitskopie)
@@ -1,5 +1,3 @@
-#define SET_NB_CFG_54 1
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/amd/mahogany_fam10/romstage.c
===================================================================
--- src/mainboard/amd/mahogany_fam10/romstage.c (Revision 6084)
+++ src/mainboard/amd/mahogany_fam10/romstage.c (Arbeitskopie)
@@ -21,8 +21,6 @@
#define SYSTEM_TYPE 1 /* DESKTOP */
//#define SYSTEM_TYPE 2 /* MOBILE */
-#define SET_NB_CFG_54 1
-
//used by incoherent_ht
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 0
Index: src/mainboard/amd/tilapia_fam10/romstage.c
===================================================================
--- src/mainboard/amd/tilapia_fam10/romstage.c (Revision 6084)
+++ src/mainboard/amd/tilapia_fam10/romstage.c (Arbeitskopie)
@@ -21,8 +21,6 @@
#define SYSTEM_TYPE 1 /* DESKTOP */
//#define SYSTEM_TYPE 2 /* MOBILE */
-#define SET_NB_CFG_54 1
-
//used by incoherent_ht
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 0
Index: src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
===================================================================
--- src/mainboard/amd/serengeti_cheetah_fam10/romstage.c (Revision 6084)
+++ src/mainboard/amd/serengeti_cheetah_fam10/romstage.c (Arbeitskopie)
@@ -21,8 +21,6 @@
//#define SYSTEM_TYPE 1 /* DESKTOP */
//#define SYSTEM_TYPE 2 /* MOBILE */
-#define SET_NB_CFG_54 1
-
//used by incoherent_ht
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 0
Index: src/mainboard/iei/kino-780am2-fam10/romstage.c
===================================================================
--- src/mainboard/iei/kino-780am2-fam10/romstage.c (Revision 6084)
+++ src/mainboard/iei/kino-780am2-fam10/romstage.c (Arbeitskopie)
@@ -21,10 +21,6 @@
#define SYSTEM_TYPE 1 /* DESKTOP */
//#define SYSTEM_TYPE 2 /* MOBILE */
-#define SET_NB_CFG_54 1
-
-//used by raminit
-
//used by incoherent_ht
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 0
Index: src/mainboard/hp/dl145_g1/romstage.c
===================================================================
--- src/mainboard/hp/dl145_g1/romstage.c (Revision 6084)
+++ src/mainboard/hp/dl145_g1/romstage.c (Arbeitskopie)
@@ -1,8 +1,3 @@
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/hp/dl145_g3/romstage.c
===================================================================
--- src/mainboard/hp/dl145_g3/romstage.c (Revision 6084)
+++ src/mainboard/hp/dl145_g3/romstage.c (Arbeitskopie)
@@ -25,10 +25,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/hp/dl165_g6_fam10/romstage.c
===================================================================
--- src/mainboard/hp/dl165_g6_fam10/romstage.c (Revision 6084)
+++ src/mainboard/hp/dl165_g6_fam10/romstage.c (Arbeitskopie)
@@ -28,11 +28,6 @@
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 1
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/tyan/s2912/ap_romstage.c
===================================================================
--- src/mainboard/tyan/s2912/ap_romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2912/ap_romstage.c (Arbeitskopie)
@@ -22,8 +22,6 @@
#define ASSEMBLY 1
#define __PRE_RAM__
-#define SET_NB_CFG_54 1
-
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#include <stdint.h>
Index: src/mainboard/tyan/s2912/romstage.c
===================================================================
--- src/mainboard/tyan/s2912/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2912/romstage.c (Arbeitskopie)
@@ -19,10 +19,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/tyan/s2850/romstage.c
===================================================================
--- src/mainboard/tyan/s2850/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2850/romstage.c (Arbeitskopie)
@@ -1,4 +1,3 @@
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -67,9 +66,6 @@
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "lib/generic_sdram.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
Index: src/mainboard/tyan/s2880/romstage.c
===================================================================
--- src/mainboard/tyan/s2880/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2880/romstage.c (Arbeitskopie)
@@ -1,4 +1,3 @@
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -68,9 +67,6 @@
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "lib/generic_sdram.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
Index: src/mainboard/tyan/s2881/romstage.c
===================================================================
--- src/mainboard/tyan/s2881/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2881/romstage.c (Arbeitskopie)
@@ -1,8 +1,3 @@
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/tyan/s4880/romstage.c
===================================================================
--- src/mainboard/tyan/s4880/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s4880/romstage.c (Arbeitskopie)
@@ -1,4 +1,3 @@
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -84,9 +83,6 @@
/* tyan does not want the default */
#include "resourcemap.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
#define RC0 ((1<<2)<<8)
Index: src/mainboard/tyan/s2891/romstage.c
===================================================================
--- src/mainboard/tyan/s2891/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2891/romstage.c (Arbeitskopie)
@@ -1,7 +1,3 @@
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/tyan/s2882/romstage.c
===================================================================
--- src/mainboard/tyan/s2882/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2882/romstage.c (Arbeitskopie)
@@ -1,4 +1,3 @@
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -68,9 +67,6 @@
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "lib/generic_sdram.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
Index: src/mainboard/tyan/s2892/romstage.c
===================================================================
--- src/mainboard/tyan/s2892/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2892/romstage.c (Arbeitskopie)
@@ -1,8 +1,3 @@
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/tyan/s4882/romstage.c
===================================================================
--- src/mainboard/tyan/s4882/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s4882/romstage.c (Arbeitskopie)
@@ -1,4 +1,3 @@
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -92,9 +91,6 @@
/* tyan does not want the default */
#include "resourcemap.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
#define RC0 ((1<<2)<<8)
Index: src/mainboard/tyan/s2875/romstage.c
===================================================================
--- src/mainboard/tyan/s2875/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2875/romstage.c (Arbeitskopie)
@@ -1,4 +1,3 @@
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -68,9 +67,6 @@
#include "lib/generic_sdram.c"
#include "northbridge/amd/amdk8/resourcemap.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
Index: src/mainboard/tyan/s2885/romstage.c
===================================================================
--- src/mainboard/tyan/s2885/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2885/romstage.c (Arbeitskopie)
@@ -1,4 +1,3 @@
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -70,9 +69,6 @@
/* tyan does not want the default */
#include "resourcemap.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
Index: src/mainboard/tyan/s2895/romstage.c
===================================================================
--- src/mainboard/tyan/s2895/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2895/romstage.c (Arbeitskopie)
@@ -1,7 +1,3 @@
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/tyan/s2912_fam10/romstage.c
===================================================================
--- src/mainboard/tyan/s2912_fam10/romstage.c (Revision 6084)
+++ src/mainboard/tyan/s2912_fam10/romstage.c (Arbeitskopie)
@@ -22,11 +22,6 @@
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 1
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/msi/ms7135/romstage.c
===================================================================
--- src/mainboard/msi/ms7135/romstage.c (Revision 6084)
+++ src/mainboard/msi/ms7135/romstage.c (Arbeitskopie)
@@ -24,10 +24,6 @@
#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1)
-#if CONFIG_LOGICAL_CPUS == 1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/msi/ms9282/romstage.c
===================================================================
--- src/mainboard/msi/ms9282/romstage.c (Revision 6084)
+++ src/mainboard/msi/ms9282/romstage.c (Arbeitskopie)
@@ -22,8 +22,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#define SET_NB_CFG_54 1
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/msi/ms9185/romstage.c
===================================================================
--- src/mainboard/msi/ms9185/romstage.c (Revision 6084)
+++ src/mainboard/msi/ms9185/romstage.c (Arbeitskopie)
@@ -23,8 +23,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#define SET_NB_CFG_54 1
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/msi/ms9652_fam10/romstage.c
===================================================================
--- src/mainboard/msi/ms9652_fam10/romstage.c (Revision 6084)
+++ src/mainboard/msi/ms9652_fam10/romstage.c (Arbeitskopie)
@@ -22,11 +22,6 @@
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 1
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/msi/ms7260/ap_romstage.c
===================================================================
--- src/mainboard/msi/ms7260/ap_romstage.c (Revision 6084)
+++ src/mainboard/msi/ms7260/ap_romstage.c (Arbeitskopie)
@@ -23,7 +23,6 @@
#define __PRE_RAM__
-#define SET_NB_CFG_54 1 /* Used by RAM init. */
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#include <stdint.h>
Index: src/mainboard/msi/ms7260/romstage.c
===================================================================
--- src/mainboard/msi/ms7260/romstage.c (Revision 6084)
+++ src/mainboard/msi/ms7260/romstage.c (Arbeitskopie)
@@ -20,10 +20,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS == 1
-#define SET_NB_CFG_54 1
-#endif
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/arima/hdama/romstage.c
===================================================================
--- src/mainboard/arima/hdama/romstage.c (Revision 6084)
+++ src/mainboard/arima/hdama/romstage.c (Arbeitskopie)
@@ -73,9 +73,6 @@
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "lib/generic_sdram.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
Index: src/mainboard/sunw/ultra40/romstage.c
===================================================================
--- src/mainboard/sunw/ultra40/romstage.c (Revision 6084)
+++ src/mainboard/sunw/ultra40/romstage.c (Arbeitskopie)
@@ -1,8 +1,3 @@
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
Index: src/mainboard/newisys/khepri/romstage.c
===================================================================
--- src/mainboard/newisys/khepri/romstage.c (Revision 6084)
+++ src/mainboard/newisys/khepri/romstage.c (Arbeitskopie)
@@ -4,7 +4,6 @@
* Additional (C) 2007 coresystems GmbH
*/
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -80,9 +79,6 @@
/* newisys khepri does not want the default */
#include "resourcemap.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
Index: src/mainboard/jetway/pa78vm5/romstage.c
===================================================================
--- src/mainboard/jetway/pa78vm5/romstage.c (Revision 6084)
+++ src/mainboard/jetway/pa78vm5/romstage.c (Arbeitskopie)
@@ -22,8 +22,6 @@
#define SYSTEM_TYPE 1 /* DESKTOP */
//#define SYSTEM_TYPE 2 /* MOBILE */
-#define SET_NB_CFG_54 1
-
//used by incoherent_ht
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 0
Index: src/mainboard/technexion/tim8690/romstage.c
===================================================================
--- src/mainboard/technexion/tim8690/romstage.c (Revision 6084)
+++ src/mainboard/technexion/tim8690/romstage.c (Arbeitskopie)
@@ -17,10 +17,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#define RC0 (6<<8)
#define RC1 (7<<8)
Index: src/mainboard/technexion/tim5690/romstage.c
===================================================================
--- src/mainboard/technexion/tim5690/romstage.c (Revision 6084)
+++ src/mainboard/technexion/tim5690/romstage.c (Arbeitskopie)
@@ -17,10 +17,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#define RC0 (6<<8)
#define RC1 (7<<8)
Index: src/mainboard/ibm/e326/romstage.c
===================================================================
--- src/mainboard/ibm/e326/romstage.c (Revision 6084)
+++ src/mainboard/ibm/e326/romstage.c (Arbeitskopie)
@@ -1,4 +1,3 @@
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -70,9 +69,6 @@
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "lib/generic_sdram.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
Index: src/mainboard/ibm/e325/romstage.c
===================================================================
--- src/mainboard/ibm/e325/romstage.c (Revision 6084)
+++ src/mainboard/ibm/e325/romstage.c (Arbeitskopie)
@@ -1,4 +1,3 @@
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -70,9 +69,6 @@
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "lib/generic_sdram.c"
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
Index: src/mainboard/nvidia/l1_2pvv/ap_romstage.c
===================================================================
--- src/mainboard/nvidia/l1_2pvv/ap_romstage.c (Revision 6084)
+++ src/mainboard/nvidia/l1_2pvv/ap_romstage.c (Arbeitskopie)
@@ -22,8 +22,6 @@
#define ASSEMBLY 1
#define __PRE_RAM__
-#define SET_NB_CFG_54 1
-
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#include <stdint.h>
Index: src/mainboard/nvidia/l1_2pvv/romstage.c
===================================================================
--- src/mainboard/nvidia/l1_2pvv/romstage.c (Revision 6084)
+++ src/mainboard/nvidia/l1_2pvv/romstage.c (Arbeitskopie)
@@ -19,10 +19,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
Index: src/mainboard/asus/m4a785-m/romstage.c
===================================================================
--- src/mainboard/asus/m4a785-m/romstage.c (Revision 6084)
+++ src/mainboard/asus/m4a785-m/romstage.c (Arbeitskopie)
@@ -21,8 +21,6 @@
#define SYSTEM_TYPE 1 /* DESKTOP */
//#define SYSTEM_TYPE 2 /* MOBILE */
-#define SET_NB_CFG_54 1
-
//used by incoherent_ht
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 0
Index: src/mainboard/asus/a8n_e/romstage.c
===================================================================
--- src/mainboard/asus/a8n_e/romstage.c (Revision 6084)
+++ src/mainboard/asus/a8n_e/romstage.c (Arbeitskopie)
@@ -24,10 +24,6 @@
/* Used by it8712f_enable_serial(). */
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
-#if CONFIG_LOGICAL_CPUS == 1
-#define SET_NB_CFG_54 1
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
--
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