Author: uwe Date: Fri Nov 26 23:42:41 2010 New Revision: 6126 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6126
Log: Broadcom BCM5785: Add TINY_BOOTBLOCK support. In bcm5785_enable_rom(): Use PCI IDs from pci_ids.h instead of hardcoding, and use 'dev' instead of 'addr' as device_t variable name. Signed-off-by: Uwe Hermann <[email protected]> Acked-by: Patrick Georgi <[email protected]> Modified: trunk/src/mainboard/broadcom/blast/romstage.c trunk/src/mainboard/hp/dl145_g3/romstage.c trunk/src/mainboard/hp/dl165_g6_fam10/romstage.c trunk/src/mainboard/msi/ms9185/romstage.c trunk/src/southbridge/broadcom/bcm5785/Kconfig trunk/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c trunk/src/southbridge/broadcom/bcm5785/bootblock.c Modified: trunk/src/mainboard/broadcom/blast/romstage.c ============================================================================== --- trunk/src/mainboard/broadcom/blast/romstage.c Fri Nov 26 23:39:40 2010 (r6125) +++ trunk/src/mainboard/broadcom/blast/romstage.c Fri Nov 26 23:42:41 2010 (r6126) @@ -10,7 +10,6 @@ #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c" -#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" @@ -82,7 +81,6 @@ /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); - bcm5785_enable_rom(); bcm5785_enable_lpc(); pc87417_enable_dev(RTC_DEV); /* Enable RTC */ } Modified: trunk/src/mainboard/hp/dl145_g3/romstage.c ============================================================================== --- trunk/src/mainboard/hp/dl145_g3/romstage.c Fri Nov 26 23:39:40 2010 (r6125) +++ trunk/src/mainboard/hp/dl145_g3/romstage.c Fri Nov 26 23:42:41 2010 (r6126) @@ -41,7 +41,6 @@ #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c" -#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" @@ -145,7 +144,6 @@ /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); - bcm5785_enable_rom(); bcm5785_enable_lpc(); pc87417_enable_dev(RTC_DEV); /* Enable RTC */ } Modified: trunk/src/mainboard/hp/dl165_g6_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/hp/dl165_g6_fam10/romstage.c Fri Nov 26 23:39:40 2010 (r6125) +++ trunk/src/mainboard/hp/dl165_g6_fam10/romstage.c Fri Nov 26 23:42:41 2010 (r6126) @@ -40,7 +40,6 @@ #include <console/console.h> #include <cpu/amd/model_10xxx_rev.h> #include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c" -#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c" #include "northbridge/amd/amdfam10/raminit.h" #include "northbridge/amd/amdfam10/amdfam10.h" #include <lib.h> @@ -109,7 +108,6 @@ /* mov bsp to bus 0xff when > 8 nodes */ set_bsp_node_CHtExtNodeCfgEn(); enumerate_ht_chain(); - bcm5785_enable_rom(); bcm5785_enable_lpc(); pc87417_enable_dev(RTC_DEV); /* Enable RTC */ } Modified: trunk/src/mainboard/msi/ms9185/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9185/romstage.c Fri Nov 26 23:39:40 2010 (r6125) +++ trunk/src/mainboard/msi/ms9185/romstage.c Fri Nov 26 23:42:41 2010 (r6126) @@ -35,7 +35,6 @@ #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c" -#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" @@ -115,7 +114,6 @@ /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); - bcm5785_enable_rom(); bcm5785_enable_lpc(); //enable RTC pc87417_enable_dev(RTC_DEV); Modified: trunk/src/southbridge/broadcom/bcm5785/Kconfig ============================================================================== --- trunk/src/southbridge/broadcom/bcm5785/Kconfig Fri Nov 26 23:39:40 2010 (r6125) +++ trunk/src/southbridge/broadcom/bcm5785/Kconfig Fri Nov 26 23:42:41 2010 (r6126) @@ -1,6 +1,7 @@ config SOUTHBRIDGE_BROADCOM_BCM5785 bool select HAVE_HARD_RESET + select TINY_BOOTBLOCK config BOOTBLOCK_SOUTHBRIDGE_INIT string Modified: trunk/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c ============================================================================== --- trunk/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c Fri Nov 26 23:39:40 2010 (r6125) +++ trunk/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c Fri Nov 26 23:42:41 2010 (r6126) @@ -18,17 +18,22 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <stdint.h> +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <device/pci_ids.h> + +/* Enable 4MB ROM access at 0xFFC00000 - 0xFFFFFFFF. */ static void bcm5785_enable_rom(void) { - unsigned char byte; - device_t addr; + u8 byte; + device_t dev; - /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */ - /* Locate the BCM 5785 SB PCI Main */ - addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201? + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SERVERWORKS, + PCI_DEVICE_ID_SERVERWORKS_BCM5785_SB_PCI_MAIN), 0); - /* Set the 4MB enable bit bit */ - byte = pci_read_config8(addr, 0x41); + /* Set the 4MB enable bits. */ + byte = pci_read_config8(dev, 0x41); byte |= 0x0e; - pci_write_config8(addr, 0x41, byte); + pci_write_config8(dev, 0x41, byte); } Modified: trunk/src/southbridge/broadcom/bcm5785/bootblock.c ============================================================================== --- trunk/src/southbridge/broadcom/bcm5785/bootblock.c Fri Nov 26 23:39:40 2010 (r6125) +++ trunk/src/southbridge/broadcom/bcm5785/bootblock.c Fri Nov 26 23:42:41 2010 (r6126) @@ -20,6 +20,7 @@ #include "bcm5785_enable_rom.c" -static void bootblock_southbridge_init(void) { - bcm5785_enable_rom(); +static void bootblock_southbridge_init(void) +{ + bcm5785_enable_rom(); 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