Hi all,
The subjects says that. Compile cbmem.c instead of including it in romstage,
and do that only if resume is done.
Signed-off-by: Rudolf Marek <[email protected]>
Thanks,
Rudolf
Index: coreboot/src/include/cbmem.h
===================================================================
--- coreboot.orig/src/include/cbmem.h 2010-12-05 10:48:19.000000000 +0100
+++ coreboot/src/include/cbmem.h 2010-12-05 10:49:27.000000000 +0100
@@ -48,7 +48,6 @@
void *cbmem_find(u32 id);
void cbmem_list(void);
void cbmem_arch_init(void);
-
-struct cbmem_entry *get_cbmem_toc(void);
+extern struct cbmem_entry *get_cbmem_toc(void);
void set_cbmem_toc(struct cbmem_entry *);
#endif
Index: coreboot/src/lib/Makefile.inc
===================================================================
--- coreboot.orig/src/lib/Makefile.inc 2010-12-05 10:29:52.000000000 +0100
+++ coreboot/src/lib/Makefile.inc 2010-12-05 10:56:24.000000000 +0100
@@ -15,6 +15,7 @@
ramstage-y += gcc.c
ramstage-y += cbmem.c
+romstage-$(CONFIG_HAVE_ACPI_RESUME) += cbmem.c
romstage-y += uart8250.c
romstage-y += memset.c
romstage-y += memcpy.c
Index: coreboot/src/lib/cbmem.c
===================================================================
--- coreboot.orig/src/lib/cbmem.c 2010-12-05 10:33:15.000000000 +0100
+++ coreboot/src/lib/cbmem.c 2010-12-05 17:39:55.000000000 +0100
@@ -50,6 +50,13 @@
{
/* do nothing, this should be called by chipset to save TOC in NVRAM */
}
+#else
+
+struct cbmem_entry *__attribute__((weak)) get_cbmem_toc(void)
+{
+ printk(BIOS_WARNING, "WARNING: you need to define this for your chipset\n");
+ return NULL;
+}
#endif
Index: coreboot/src/mainboard/asrock/939a785gmh/romstage.c
===================================================================
--- coreboot.orig/src/mainboard/asrock/939a785gmh/romstage.c 2010-12-05 10:30:33.000000000 +0100
+++ coreboot/src/mainboard/asrock/939a785gmh/romstage.c 2010-12-05 10:36:23.000000000 +0100
@@ -67,16 +67,6 @@
#include "lib/generic_sdram.c"
#include "resourcemap.c"
#include "cpu/amd/dualcore/dualcore.c"
-
-
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
#include "cpu/amd/model_fxx/fidvid.c"
Index: coreboot/src/mainboard/asus/m2v-mx_se/romstage.c
===================================================================
--- coreboot.orig/src/mainboard/asus/m2v-mx_se/romstage.c 2010-12-05 10:35:44.000000000 +0100
+++ coreboot/src/mainboard/asus/m2v-mx_se/romstage.c 2010-12-05 10:35:53.000000000 +0100
@@ -74,15 +74,6 @@
#define SB_VFSMAF 0
-
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
/* this function might fail on some K8 CPUs with errata #181 */
static void ldtstop_sb(void)
{
Index: coreboot/src/mainboard/asus/m2v/romstage.c
===================================================================
--- coreboot.orig/src/mainboard/asus/m2v/romstage.c 2010-12-05 10:35:26.000000000 +0100
+++ coreboot/src/mainboard/asus/m2v/romstage.c 2010-12-05 10:35:33.000000000 +0100
@@ -73,15 +73,6 @@
#include "cpu/amd/dualcore/dualcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
#include "cpu/amd/model_fxx/fidvid.c"
#include "northbridge/amd/amdk8/resourcemap.c"
Index: coreboot/src/mainboard/getac/p470/romstage.c
===================================================================
--- coreboot.orig/src/mainboard/getac/p470/romstage.c 2010-12-05 10:38:11.000000000 +0100
+++ coreboot/src/mainboard/getac/p470/romstage.c 2010-12-05 10:38:37.000000000 +0100
@@ -264,14 +264,6 @@
#include <cbmem.h>
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM_ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
void main(unsigned long bist)
{
u32 reg32;
Index: coreboot/src/mainboard/ibase/mb899/romstage.c
===================================================================
--- coreboot.orig/src/mainboard/ibase/mb899/romstage.c 2010-12-05 10:39:31.000000000 +0100
+++ coreboot/src/mainboard/ibase/mb899/romstage.c 2010-12-05 10:39:36.000000000 +0100
@@ -226,14 +226,6 @@
#include <cbmem.h>
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
void main(unsigned long bist)
{
u32 reg32;
Index: coreboot/src/mainboard/intel/d945gclf/romstage.c
===================================================================
--- coreboot.orig/src/mainboard/intel/d945gclf/romstage.c 2010-12-05 10:36:43.000000000 +0100
+++ coreboot/src/mainboard/intel/d945gclf/romstage.c 2010-12-05 10:37:19.000000000 +0100
@@ -188,14 +188,6 @@
#include <cbmem.h>
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
void main(unsigned long bist)
{
u32 reg32;
Index: coreboot/src/mainboard/kontron/986lcd-m/romstage.c
===================================================================
--- coreboot.orig/src/mainboard/kontron/986lcd-m/romstage.c 2010-12-05 10:38:51.000000000 +0100
+++ coreboot/src/mainboard/kontron/986lcd-m/romstage.c 2010-12-05 10:38:56.000000000 +0100
@@ -315,14 +315,6 @@
#include <cbmem.h>
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
void main(unsigned long bist)
{
u32 reg32;
Index: coreboot/src/mainboard/roda/rk886ex/romstage.c
===================================================================
--- coreboot.orig/src/mainboard/roda/rk886ex/romstage.c 2010-12-05 10:37:45.000000000 +0100
+++ coreboot/src/mainboard/roda/rk886ex/romstage.c 2010-12-05 10:37:57.000000000 +0100
@@ -237,14 +237,6 @@
#include <cbmem.h>
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
void main(unsigned long bist)
{
u32 reg32;
--
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