Author: uwe Date: Mon Dec 6 02:11:12 2010 New Revision: 6141 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6141
Log: Add initial support for the ASUS M4A78-EM. Signed-off-by: Juhana Helovuo <[email protected]> Acked-by: Uwe Hermann <[email protected]> Added: trunk/src/mainboard/asus/m4a78-em/ - copied from r6139, trunk/src/mainboard/asus/m4a785-m/ Modified: trunk/src/mainboard/asus/Kconfig trunk/src/mainboard/asus/m4a78-em/Kconfig trunk/src/mainboard/asus/m4a78-em/devicetree.cb trunk/src/mainboard/asus/m4a78-em/irq_tables.c trunk/src/mainboard/asus/m4a78-em/mainboard.c trunk/src/mainboard/asus/m4a78-em/mptable.c trunk/src/mainboard/asus/m4a785-m/irq_tables.c trunk/src/mainboard/asus/m4a785-m/mainboard.c Modified: trunk/src/mainboard/asus/Kconfig ============================================================================== --- trunk/src/mainboard/asus/Kconfig Sun Dec 5 23:36:14 2010 (r6140) +++ trunk/src/mainboard/asus/Kconfig Mon Dec 6 02:11:12 2010 (r6141) @@ -33,6 +33,8 @@ bool "M2V-MX SE" config BOARD_ASUS_M4A785M bool "M4A785-M" +config BOARD_ASUS_M4A78_EM + bool "M4A78-EM" config BOARD_ASUS_MEW_AM bool "MEW-AM" config BOARD_ASUS_MEW_VM @@ -58,6 +60,7 @@ source "src/mainboard/asus/m2v/Kconfig" source "src/mainboard/asus/m2v-mx_se/Kconfig" source "src/mainboard/asus/m4a785-m/Kconfig" +source "src/mainboard/asus/m4a78-em/Kconfig" source "src/mainboard/asus/mew-am/Kconfig" source "src/mainboard/asus/mew-vm/Kconfig" source "src/mainboard/asus/p2b/Kconfig" Modified: trunk/src/mainboard/asus/m4a78-em/Kconfig ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/Kconfig Sat Dec 4 21:50:39 2010 (r6139) +++ trunk/src/mainboard/asus/m4a78-em/Kconfig Mon Dec 6 02:11:12 2010 (r6141) @@ -1,4 +1,4 @@ -if BOARD_ASUS_M4A785M +if BOARD_ASUS_M4A78_EM config BOARD_SPECIFIC_OPTIONS # dummy def_bool y @@ -8,7 +8,6 @@ select NORTHBRIDGE_AMD_AMDFAM10 select SOUTHBRIDGE_AMD_RS780 select SOUTHBRIDGE_AMD_SB700 - select SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT select SUPERIO_ITE_IT8712F select BOARD_HAS_FADT select HAVE_BUS_CONFIG @@ -31,7 +30,7 @@ config MAINBOARD_DIR string - default asus/m4a785-m + default asus/m4a78-em config APIC_ID_OFFSET hex @@ -39,7 +38,7 @@ config MAINBOARD_PART_NUMBER string - default "M4A785-M" + default "M4A78-EM" config MAX_CPUS int @@ -67,7 +66,7 @@ config IRQ_SLOT_COUNT int - default 19 + default 18 config AMD_UCODE_PATCH_FILE string @@ -83,7 +82,7 @@ config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID hex - default 0x83a2 + default 0x83f1 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID hex Modified: trunk/src/mainboard/asus/m4a78-em/devicetree.cb ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/devicetree.cb Sat Dec 4 21:50:39 2010 (r6139) +++ trunk/src/mainboard/asus/m4a78-em/devicetree.cb Mon Dec 6 02:11:12 2010 (r6141) @@ -10,15 +10,15 @@ chip southbridge/amd/rs780 device pci 0.0 on end # HT 0x9600 device pci 1.0 on end # Internal Graphics P2P bridge 0x9602 - device pci 2.0 off end # PCIE P2P bridge (external graphics) 0x9603 - device pci 3.0 off end # PCIE P2P bridge 0x960b - device pci 4.0 off end # PCIE P2P bridge 0x9604 + device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603 + device pci 3.0 on end # PCIE P2P bridge 0x960b + device pci 4.0 on end # PCIE P2P bridge 0x9604 device pci 5.0 off end # PCIE P2P bridge 0x9605 device pci 6.0 off end # PCIE P2P bridge 0x9606 device pci 7.0 off end # PCIE P2P bridge 0x9607 device pci 8.0 off end # NB/SB Link P2P bridge - device pci 9.0 off end # - device pci a.0 on end # bridge to RTL8111/8168B PCI Express Gigabit Ethernet + device pci 9.0 on end # + device pci a.0 on end # bridge to RTL8112 PCI Express Gigabit Ethernet register "gppsb_configuration" = "1" # Configuration B register "gpp_configuration" = "3" # Configuration D default register "port_enable" = "0x6fc" Modified: trunk/src/mainboard/asus/m4a78-em/irq_tables.c ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/irq_tables.c Sat Dec 4 21:50:39 2010 (r6139) +++ trunk/src/mainboard/asus/m4a78-em/irq_tables.c Mon Dec 6 02:11:12 2010 (r6141) @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 200x TODO <t...@todo> + * Copyright (C) 2010 Juhana Helovuo <[email protected]> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,7 +23,7 @@ const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ - 32 + 16 * 19, /* Max. number of devices on the bus */ + 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* Max. number of devices on the bus */ 0x00, /* Interrupt router bus */ (0x14 << 3) | 0x3, /* Interrupt router dev */ 0, /* IRQs devoted exclusively to PCI usage */ @@ -31,7 +31,7 @@ 0x439d, /* Device */ 0, /* Miniport */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x8, /* Checksum (has to be set to some value that + 0xca, /* Checksum (has to be set to some value that * would give 0 after the sum of all bytes * for this structure (including checksum). */ @@ -53,9 +53,8 @@ {0x00, (0x12 << 3) | 0x0, {{0x01, 0xdc90}, {0x02, 0xdc90}, {0x03, 0xdc90}, {0x04, 0xdc90}}, 0x0, 0x0}, {0x00, (0x13 << 3) | 0x0, {{0x03, 0xdc90}, {0x04, 0xdc90}, {0x01, 0xdc90}, {0x02, 0xdc90}}, 0x0, 0x0}, {0x00, (0x11 << 3) | 0x0, {{0x0c, 0xdc90}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, - {0x0a, (0x00 << 3) | 0x0, {{0x03, 0xdc90}, {0x04, 0xdc90}, {0x01, 0xdc90}, {0x02, 0xdc90}}, 0x0, 0x0}, - {0x03, (0x05 << 3) | 0x0, {{0x0a, 0xdc90}, {0x0b, 0xdc90}, {0x0c, 0xdc90}, {0x0d, 0xdc90}}, 0xc, 0x0}, - {0x03, (0x06 << 3) | 0x0, {{0x0b, 0xdc90}, {0x0c, 0xdc90}, {0x0d, 0xdc90}, {0x0a, 0xdc90}}, 0xd, 0x0}, + {0x03, (0x06 << 3) | 0x0, {{0x0a, 0xdc90}, {0x0b, 0xdc90}, {0x0c, 0xdc90}, {0x0d, 0xdc90}}, 0xd, 0x0}, + {0x03, (0x07 << 3) | 0x0, {{0x0b, 0xdc90}, {0x0c, 0xdc90}, {0x0d, 0xdc90}, {0x0a, 0xdc90}}, 0xe, 0x0}, } }; Modified: trunk/src/mainboard/asus/m4a78-em/mainboard.c ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/mainboard.c Sat Dec 4 21:50:39 2010 (r6139) +++ trunk/src/mainboard/asus/m4a78-em/mainboard.c Mon Dec 6 02:11:12 2010 (r6141) @@ -27,19 +27,11 @@ #include <southbridge/amd/sb700/sb700.h> #include "chip.h" -#define ADT7461_ADDRESS 0x4C -#define ARA_ADDRESS 0x0C /* Alert Response Address */ extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address); extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val); -#define ADT7461_read_byte(address) \ - do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address) -#define ARA_read_byte(address) \ - do_smbus_read_byte(SMBUS_IO_BASE, ARA_ADDRESS, address) -#define ADT7461_write_byte(address, val) \ - do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val) #define SMBUS_IO_BASE 0x6000 @@ -132,7 +124,7 @@ /* * justify the dev3 is exist or not * NOTE: This just copied from AMD Tilapia code. - * It is completly unknown it it will work at all for Asus M4A785-A + * It is completly unknown if it will work at all for this board. */ u8 is_dev3_present(void) { @@ -159,77 +151,14 @@ } } -/* - * set thermal config - */ -static void set_thermal_config(void) -{ - u8 byte; - u16 word; - device_t sm_dev; - - /* set ADT 7461 */ - ADT7461_write_byte(0x0B, 0x50); /* Local Temperature Hight limit */ - ADT7461_write_byte(0x0C, 0x00); /* Local Temperature Low limit */ - ADT7461_write_byte(0x0D, 0x50); /* External Temperature Hight limit High Byte */ - ADT7461_write_byte(0x0E, 0x00); /* External Temperature Low limit High Byte */ - - ADT7461_write_byte(0x19, 0x55); /* External THERM limit */ - ADT7461_write_byte(0x20, 0x55); /* Local THERM limit */ - - byte = ADT7461_read_byte(0x02); /* read status register to clear it */ - ARA_read_byte(0x05); /* A hardware alert can only be cleared by the master sending an ARA as a read command */ - printk(BIOS_INFO, "Init adt7461 end , status 0x02 %02x\n", byte); - - /* sb700 settings for thermal config */ - /* set SB700 GPIO 64 to GPIO with pull-up */ - byte = pm2_ioread(0x42); - byte &= 0x3f; - pm2_iowrite(0x42, byte); - - /* set GPIO 64 to input */ - sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); - word = pci_read_config16(sm_dev, 0x56); - word |= 1 << 7; - pci_write_config16(sm_dev, 0x56, word); - - /* set GPIO 64 internal pull-up */ - byte = pm2_ioread(0xf0); - byte &= 0xee; - pm2_iowrite(0xf0, byte); - - /* set Talert to be active low */ - byte = pm_ioread(0x67); - byte &= ~(1 << 5); - pm_iowrite(0x67, byte); - - /* set Talert to generate ACPI event */ - byte = pm_ioread(0x3c); - byte &= 0xf3; - pm_iowrite(0x3c, byte); - - /* THERMTRIP pin */ - /* byte = pm_ioread(0x68); - * byte |= 1 << 3; - * pm_iowrite(0x68, byte); - * - * byte = pm_ioread(0x55); - * byte |= 1 << 0; - * pm_iowrite(0x55, byte); - * - * byte = pm_ioread(0x67); - * byte &= ~( 1 << 6); - * pm_iowrite(0x67, byte); - */ -} /************************************************* -* enable the dedicated function in m4a785m board. +* enable the dedicated function in this board. * This function called early than rs780_enable. *************************************************/ -static void m4a785m_enable(device_t dev) +static void m4a78em_enable(device_t dev) { - printk(BIOS_INFO, "Mainboard M4A785M Enable. dev=0x%p\n", dev); + printk(BIOS_INFO, "Mainboard enable. dev=0x%p\n", dev); #if (CONFIG_GFXUMA == 1) msr_t msr, msr2; @@ -272,10 +201,10 @@ set_pcie_dereset(); /* get_ide_dma66(); */ - set_thermal_config(); + /* set_thermal_config(); */ } struct chip_operations mainboard_ops = { - CHIP_NAME("AMD M4A785M Mainboard") - .enable_dev = m4a785m_enable, + CHIP_NAME("ASUS M4A78-EM Mainboard") + .enable_dev = m4a78em_enable, }; Modified: trunk/src/mainboard/asus/m4a78-em/mptable.c ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/mptable.c Sat Dec 4 21:50:39 2010 (r6139) +++ trunk/src/mainboard/asus/m4a78-em/mptable.c Mon Dec 6 02:11:12 2010 (r6141) @@ -40,7 +40,7 @@ mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, "M4A785-M ", LAPIC_ADDR); + mptable_init(mc, "M4A78-EM ", LAPIC_ADDR); smp_write_processors(mc); Modified: trunk/src/mainboard/asus/m4a785-m/irq_tables.c ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/irq_tables.c Sun Dec 5 23:36:14 2010 (r6140) +++ trunk/src/mainboard/asus/m4a785-m/irq_tables.c Mon Dec 6 02:11:12 2010 (r6141) @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 200x TODO <t...@todo> + * Copyright (C) 2010 Juhana Helovuo <[email protected]> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,7 +23,7 @@ const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ - 32 + 16 * 19, /* Max. number of devices on the bus */ + 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* Max. number of devices on the bus */ 0x00, /* Interrupt router bus */ (0x14 << 3) | 0x3, /* Interrupt router dev */ 0, /* IRQs devoted exclusively to PCI usage */ Modified: trunk/src/mainboard/asus/m4a785-m/mainboard.c ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/mainboard.c Sun Dec 5 23:36:14 2010 (r6140) +++ trunk/src/mainboard/asus/m4a785-m/mainboard.c Mon Dec 6 02:11:12 2010 (r6141) @@ -132,7 +132,7 @@ /* * justify the dev3 is exist or not * NOTE: This just copied from AMD Tilapia code. - * It is completly unknown it it will work at all for Asus M4A785-A + * It is completly unknown it it will work at all for ASUS M4A785-M. */ u8 is_dev3_present(void) { @@ -224,12 +224,12 @@ } /************************************************* -* enable the dedicated function in m4a785m board. +* enable the dedicated function in this board. * This function called early than rs780_enable. *************************************************/ static void m4a785m_enable(device_t dev) { - printk(BIOS_INFO, "Mainboard M4A785M Enable. dev=0x%p\n", dev); + printk(BIOS_INFO, "Mainboard enable. dev=0x%p\n", dev); #if (CONFIG_GFXUMA == 1) msr_t msr, msr2; @@ -276,6 +276,6 @@ } struct chip_operations mainboard_ops = { - CHIP_NAME("AMD M4A785M Mainboard") + CHIP_NAME("ASUS M4A785-M Mainboard") .enable_dev = m4a785m_enable, }; -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
