Author: zbao Date: Mon Dec 6 09:19:38 2010 New Revision: 6142 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6142
Log: Before lane reversal, De-asserts STRAP_BIF_all_valid for PCIE-GFX core. After lane reversal, Asserts STRAP_BIF_all_valid for PCIE-GFX core. Signed-off-by: Zheng Bao <[email protected]> Acked-by: QingPei Wang <[email protected]> Modified: trunk/src/southbridge/amd/rs780/rs780_gfx.c Modified: trunk/src/southbridge/amd/rs780/rs780_gfx.c ============================================================================== --- trunk/src/southbridge/amd/rs780/rs780_gfx.c Mon Dec 6 02:11:12 2010 (r6141) +++ trunk/src/southbridge/amd/rs780/rs780_gfx.c Mon Dec 6 09:19:38 2010 (r6142) @@ -1302,8 +1302,10 @@ if(is_dev3_present()){ /* step 1, lane reversal (only need if CMOS option is enabled) */ if (cfg->gfx_lane_reversal) { + set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 1 << 31); set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2); set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 3, 1 << 3); + set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 0 << 31); } printk(BIOS_DEBUG, "rs780_gfx_init step1.\n"); /* step 1.1, dual-slot gfx configuration (only need if CMOS option is enabled) */ @@ -1317,10 +1319,11 @@ }else{ if (cfg->gfx_lane_reversal) { + set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 1 << 31); set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2); + set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 0 << 31); } printk(BIOS_DEBUG, "rs780_gfx_init step1.\n"); - printk(BIOS_DEBUG, "rs780_gfx_init step2.\n"); if((dev->path.pci.devfn >> 3) == 2) single_port_configuration(nb_dev, dev); -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
