Author: kerry Date: Tue Jan 4 07:15:46 2011 New Revision: 6238 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6238
Log: Trivial: use the IO_APIC_ADDR constant defined in ioapic.h, and spell check Signed-off-by: Kerry She <[email protected]> Acked-by: Kerry She <[email protected]> Modified: trunk/src/mainboard/amd/bimini_fam10/acpi_tables.c trunk/src/mainboard/amd/bimini_fam10/devicetree.cb Modified: trunk/src/mainboard/amd/bimini_fam10/acpi_tables.c ============================================================================== --- trunk/src/mainboard/amd/bimini_fam10/acpi_tables.c Sun Jan 2 00:36:03 2011 (r6237) +++ trunk/src/mainboard/amd/bimini_fam10/acpi_tables.c Tue Jan 4 07:15:46 2011 (r6238) @@ -20,6 +20,7 @@ #include <console/console.h> #include <string.h> #include <arch/acpi.h> +#include <arch/ioapic.h> #include <device/pci.h> #include <device/pci_ids.h> #include <cpu/x86/msr.h> @@ -56,8 +57,6 @@ extern const unsigned char AmlCode_ssdt5[]; #endif -#define IO_APIC_ADDR 0xfec00000UL - unsigned long acpi_fill_mcfg(unsigned long current) { /* Just a dummy */ Modified: trunk/src/mainboard/amd/bimini_fam10/devicetree.cb ============================================================================== --- trunk/src/mainboard/amd/bimini_fam10/devicetree.cb Sun Jan 2 00:36:03 2011 (r6237) +++ trunk/src/mainboard/amd/bimini_fam10/devicetree.cb Tue Jan 4 07:15:46 2011 (r6238) @@ -31,7 +31,7 @@ register "gfx_reconfiguration" = "1" register "gfx_link_width" = "0" end - chip southbridge/amd/cimx_wrapper/sb800 # it is under NB/SB Link, but on the same pri bus + chip southbridge/amd/cimx_wrapper/sb800 # it is under NB/SB Link, but on the same pci bus device pci 11.0 on end # SATA device pci 12.0 on end # USB device pci 12.2 on end # USB -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
