On Thu, Jan 27, 2011 at 6:38 AM, Joseph Smith <[email protected]> wrote: > > > On Thu, 27 Jan 2011 06:15:34 -0700, Myles Watson <[email protected]> wrote: >> On Thu, Jan 27, 2011 at 5:29 AM, Joseph Smith <[email protected]> > wrote: >>> Hello, >>> Working on a new CK804 board >> Which board did you base it on? What are the differences? >> > I based it on the Asus A8N-E. The only differences are: > > 1. A8N-E supports 1 Athlon64 dualcore CPU, My board (Asus K8N-DRE) supports > 2 Opteron dualcore CPU's > 2. SuperIO's are different. I would think that there is a board that's more similar, then, but I'm not sure.
> But besides that, all the rest of the hardware is the same as far as I can > tell. > >>> and I have it almost booting but it seems the >>> resource allocator does not like / or want to enumerate the CK804. >> >> It fails before resource allocation, at device enumeration. It's hard >> to tell from the log why it went south, but are you sure that the >> Southbridge is on HT link 1? > > I have no idea how can I tell? > Is there a way to tell what HT link it is on with the factory bios? There are a couple of ways. lspci from the factory BIOS is probably the easiest. There are a couple of registers that would tell you. Try: sudo lspci -xxx -s 18.0 Then look at the line that starts with e0: mine is: e0: 03 00 00 03 03 01 40 40 ... >From the BKDG: Configuration Base and Limit 0–3 Registers Function 1: Offset E0h, E4h, E8h, ECh Remember that the byte order is little endian, and my registers are: e0 03000003 - bus 0-3 on node 0 link 0 rw enabled e4 40400103 - bus 40-40 on node 0 link 1 rw enabled > If you would like to take alook at the code I have so far, let me know I > can email it to you. Thanks for help Myles. The patch shouldn't be too big, you could just send it to the list. Thanks, Myles -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
