On Sun, Jan 30, 2011 at 12:32 PM, Stefan Reinauer <[email protected]> wrote: > * xdrudis <[email protected]> [110130 15:46]: >> On Sat, Jan 29, 2011 at 11:09:05AM +0100, xdrudis wrote: >> > is what I have. My board does not get to ramstage, so it might not >> > work there. It works for my serial console but should work for net or >> >> Ok, now I see it. It won't work with sprintf in ramstage. > > It should not be needed in ram stage, as we have locking there. >
I think that the locking can be added via the BSPs cache. All multicore should use CAR and it is a matter of adding it where it won't get stepped on by the normal use of CAR. For AMD fam10, the sysinfo setup would need to be fixed up. Marc -- http://se-eng.com -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
