Author: ruik Date: Sat Feb 26 20:46:08 2011 New Revision: 6384 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6384
Log: Following patch fills in the callbacks for PCIe x16 resets. This board uses GPM8,GPM9 as reset toggles. Signed-off-by: Rudolf Marek <[email protected]> Acked-by: Peter Stuge <[email protected]> Modified: trunk/src/mainboard/asrock/939a785gmh/mainboard.c Modified: trunk/src/mainboard/asrock/939a785gmh/mainboard.c ============================================================================== --- trunk/src/mainboard/asrock/939a785gmh/mainboard.c Sat Feb 26 19:42:04 2011 (r6383) +++ trunk/src/mainboard/asrock/939a785gmh/mainboard.c Sat Feb 26 20:46:08 2011 (r6384) @@ -35,12 +35,31 @@ void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); + +static void pcie_rst_toggle(u8 val) { + u8 byte; + + byte = pm_ioread(0x8d); + byte &= ~(3 << 1); + pm_iowrite(0x8d, byte); + + byte = pm_ioread(0x94); + /* Output enable */ + byte &= ~(3 << 2); + /* Toggle GPM8, GPM9 */ + byte &= ~(3 << 0); + byte |= val; + pm_iowrite(0x94, byte); +} + void set_pcie_dereset() { + pcie_rst_toggle(0x3); } void set_pcie_reset() { + pcie_rst_toggle(0x0); } #if 0 /* not tested yet */ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
