repository service wrote: > +++ trunk/src/mainboard/amd/persimmon/romstage.c Sun May 15 23:48:22 > 2011 (r6582) .. > + volatile u32 *spiBase = (void *) 0xa0000000; > + u32 save; > + __outdword (0xcf8, 0x8000a3a0); > + save = __indword (0xcfc); > + __outdword (0xcfc, (u32) spiBase | 2); // set temp MMIO base > + spiBase [3] = (spiBase [3] & ~(3 << 14)) | (1 << 14); > + spiBase [0] |= 1 << 18; // fast read enable > + __outdword (0xcfc, save); // clear temp base
Are there some PCI access functions available also in romstage? //Peter -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
