Author: mjones Date: Mon May 16 01:13:54 2011 New Revision: 6596 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6596
Log: Remove multiple mmconf settings and just use kconfig setting. Signed-off-by: Marc Jones <[email protected]> Acked-by: Marc Jones <[email protected]> Modified: trunk/src/mainboard/amd/persimmon/dsdt.asl trunk/src/vendorcode/amd/cimx/sb800/OEM.h Modified: trunk/src/mainboard/amd/persimmon/dsdt.asl ============================================================================== --- trunk/src/mainboard/amd/persimmon/dsdt.asl Mon May 16 00:40:40 2011 (r6595) +++ trunk/src/mainboard/amd/persimmon/dsdt.asl Mon May 16 01:13:54 2011 (r6596) @@ -36,7 +36,7 @@ Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ Name(PBLN, 0x0) /* Length of BIOS area */ - Name(PCBA, 0xF8000000) /* Base address of PCIe config space */ + Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ Modified: trunk/src/vendorcode/amd/cimx/sb800/OEM.h ============================================================================== --- trunk/src/vendorcode/amd/cimx/sb800/OEM.h Mon May 16 00:40:40 2011 (r6595) +++ trunk/src/vendorcode/amd/cimx/sb800/OEM.h Mon May 16 01:13:54 2011 (r6596) @@ -48,7 +48,7 @@ #ifdef MOVE_PCIEBAR_TO_F0000000 #define PCIEX_BASE_ADDRESS 0xF7000000 #else - #define PCIEX_BASE_ADDRESS 0xF8000000 + #define PCIEX_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS #endif /** -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
