An excellent piece of debug. I spent a few days debugging this particular problem and can appreciate the work that Scott must have put in.
I have tested the patch on the bimini_fam10 platform. I can't see any compromises in applying this patch so should it be considered it a fix rather than a workaround? Acked-by: David Robinson <[email protected]> Blue Chip Technology David Robinson Software Development Engineer Tel : +44 (0) 1829 772000 Fax : +44 (0) 1829 772001 www.bluechiptechnology.co.uk Industrial Computers | Single Board Computers | Panel PCs | Data Acquisition | Digital Signage | Custom Design Engineer Solutions for Embedded and Industrial Computing ----- Original Message ----- From: [email protected] To: [email protected] Sent: Wednesday, 18 May, 2011 7:40:46 AM Subject: coreboot Digest, Vol 75, Issue 54 Send coreboot mailing list submissions to [email protected] To subscribe or unsubscribe via the World Wide Web, visit http://www.coreboot.org/mailman/listinfo/coreboot or, via email, send a message with subject or body 'help' to [email protected] You can reach the person managing the list at [email protected] When replying, please edit your Subject line so it is more specific than "Re: Contents of coreboot digest..." Today's Topics: 1. Re: How long will take to add coreboot support for my motherboard? Please, expert roughly estimation needed. (Peter Stuge) 2. Re: How long will take to add coreboot support for my motherboard? Please, expert roughly estimation needed. (Vikram Narayanan) 3. Re: How long will take to add coreboot support for my motherboard? Please, expert roughly estimation needed. (Vikram Narayanan) 4. Re: Kconfig vs. devicetree vs. CMOS policy for options? (Scott Duplichan) 5. [PATCH] workaround for "An unexpected error (805262864) occurred at line 1768 of d:\xpclient\base\boot\setup\arcdisp.c" (Scott Duplichan) ---------------------------------------------------------------------- Message: 1 Date: Wed, 18 May 2011 03:40:36 +0200 From: Peter Stuge <[email protected]> To: coreboot <[email protected]> Subject: Re: [coreboot] How long will take to add coreboot support for my motherboard? Please, expert roughly estimation needed. Message-ID: <[email protected]> Content-Type: text/plain; charset=us-ascii Vikram Narayanan wrote: > Thank you. I think this can also be in Developer wiki. This might > give an insight of how much work is involved. > (or is it already there in the wiki?) Dunno..? Isn't it mostly common sense? (That development can be fast or slow, and depends on how much can be reused.) I'm not saying I am opposed to it being in the wiki, but it's also easy to spam the FAQ.. //Peter ------------------------------ Message: 2 Date: Wed, 18 May 2011 07:18:05 +0530 From: Vikram Narayanan <[email protected]> To: peter <[email protected]> Cc: coreboot <[email protected]> Subject: Re: [coreboot] How long will take to add coreboot support for my motherboard? Please, expert roughly estimation needed. Message-ID: <[email protected]> Content-Type: text/plain; charset=ISO-8859-1 On Wed, May 18, 2011 at 7:10 AM, Peter Stuge <[email protected]> wrote: > Vikram Narayanan wrote: >> Thank you. I think this can also be in Developer wiki. This might >> give an insight of how much work is involved. >> (or is it already there in the wiki?) > > Dunno..? Isn't it mostly common sense? (That development can be fast > or slow, and depends on how much can be reused.) I'm not saying I am > opposed to it being in the wiki, but it's also easy to spam the FAQ.. I agree with you. But for people who are new to the porting, this may be helpful. I don't know how many of the newbies to coreboot are aware of the fact that many things can be reused, and sometimes porting is very easy. Just a thought (to include this in wiki). - Thanks, Vikram ------------------------------ Message: 3 Date: Wed, 18 May 2011 07:08:02 +0530 From: Vikram Narayanan <[email protected]> To: [email protected] Cc: coreboot <[email protected]> Subject: Re: [coreboot] How long will take to add coreboot support for my motherboard? Please, expert roughly estimation needed. Message-ID: <[email protected]> Content-Type: text/plain; charset=ISO-8859-1 On Tue, May 17, 2011 at 10:52 PM, Peter Stuge <[email protected]> wrote: > Vikram Narayanan wrote: >> > It took me less then 8 hours to make my first port, and I'm not even a C >> > programmer, mine was a best case senario as there was a sibling board >> > already ported. I have also ported some where just the component where >> > supported, that didn't take to long either, probably 7-10 hours. >> > >> > Working on a board where only legacy code and docs are available I have >> > probably spend around 12 hours to get to ram init. >> > >> > I think the key to sussess is to have an easy way to reflash the bios when >> > your image failes. >> >> Seems quite inspirational to the people who wanted to port for new >> boards. >> @ Stefan: Can you please share your opinions on this? > > The time required of course depends on many factors. In general > terms, these are: > > 1. Ability to understand or learn C and programming languages in > ? general, and hardware structure. > 2. Hardware differences. > 3. How much similar code there already exists in coreboot. > 4. How readable the code is that does exist in coreboot and is > ? relevant for the project. > > In concrete terms, they are: > > 1. Programming and electronics experience, and abstract thinking > 2. How similar your mainboard is to another already supported > ? mainboard. > 3. If *any* similar mainboard is already supported by coreboot. > ? By similar I mean exact same relevant components; cpu north south > ? superio. > 4. Quality of coreboot code for cpu north south superio. > > These are just the factors to consider *when all components are > supported already*. In ideal circumstances a board port needs to take > only one hour. In reality, circumstances are never ideal and the time > needed per board grows exponentially or even steeper still with the > number of less than ideal points to consider. > > Worst case is so far 8-12 man-months for a coreboot expert. Thank you. I think this can also be in Developer wiki. This might give an insight of how much work is involved. (or is it already there in the wiki?) - Thanks, Vikram ------------------------------ Message: 4 Date: Wed, 18 May 2011 00:48:31 -0500 From: "Scott Duplichan" <[email protected]> To: <[email protected]> Subject: Re: [coreboot] Kconfig vs. devicetree vs. CMOS policy for options? Message-ID: <C5BB8B6D2558476B992F0423D71387E8@asusp67> Content-Type: text/plain; charset="us-ascii" Anders Jenbo wrote: ]You could use http://driverpacks.net/ to incorporate the AHCI driveres ]on your cd. Hello Anders, Thanks for the suggestion. I did find that site the other day. At first it looked like what I needed. But when I went to choose a download, I I could find x64 packs only for Vista/7. I use the x64 edition of XP or Server 2003. Thanks, Scott ------------------------------ Message: 5 Date: Wed, 18 May 2011 01:40:08 -0500 From: "Scott Duplichan" <[email protected]> To: <[email protected]> Subject: [coreboot] [PATCH] workaround for "An unexpected error (805262864) occurred at line 1768 of d:\xpclient\base\boot\setup\arcdisp.c" Message-ID: <EA29AB5623234450BF6A861986753B34@asusp67> Content-Type: text/plain; charset="us-ascii" The attached patch works around a Windows XP or Server 2003 setup failure where an error message such as: "An unexpected error (805262864) occurred at line 1768 of d:\xpclient\base\boot\setup\arcdisp.c" The value 805262864 varies, and is the physical address, in decimal, of one of the ACPI tables. Tested on Persimmon. Others abuild tested only. Signed-off-by: Scott Duplichan <[email protected]> Detailed explanation: The error message is displayed when a 1024 dword page table array used by setupldr runs out of space. This table is used for mapping various physical addresses, such as those of ACPI tables (a separate table identity maps the lower 16MB used by setupldr code and data). Setupldr only looks at ACPI tables (FACP) to determine make and model of the system. The make and model of the system is needed when setupldr scans the good/bad bios lists contained in txtsetup.sif. The good/bad bios lists are used to bypass installation of the ACPI enabled kernel on certain systems known to have ACPI problems. The code loop that scans the lists creates a new mapping each time it reads an ACPI table, and never frees mappings. The code uses FACP OEM ID to determine the system model. The code sequentially reads tables listed in the RSDT array until the FACP is found. Each read consumes one page table entry. If more that 4 tables precede the FACP in the RSDT array, the 1024 entry page table array will run out of space before the good/bad bios list processing completes. BIOS can work around this Windows XP/Server 2003 limitation by placing the FACP early in the RSDT array. Thanks, Scott -------------- next part -------------- A non-text attachment was scrubbed... Name: xp-workaround.patch Type: application/octet-stream Size: 21959 bytes Desc: not available URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20110518/d5dedce5/attachment.obj> ------------------------------ _______________________________________________ coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot End of coreboot Digest, Vol 75, Issue 54 **************************************** Blue Chip Technology Limited. Chowley Oak Lane, Tattenhall, Chester, Cheshire CH3 9EX Tel: 01829 772000 Registered in England 3110403 Vat No: GB 618 374134 -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
