> Just to completely rule out the bad SPD idea, can you please dump the
> SPD content when you boot with the production BIOS? i2cdump output
> (ASCII) or raw output from sysfs would be great. Then we can plug it
> into bc and confirm that the checksum is correct. This would also be a
> good way to confirm that the SPD addresses are correct in Coreboot,
> and rule out the possibility that ASRock changed SPD addressing
> between board revisions...
Attaching /sys/bus/i2c/drivers/eeprom/0-0050/eeprom as hex file
+ i2cdump output
No size specified (using byte-data access)
WARNING! This program can confuse your I2C bus, cause data loss and worse!
I will probe file /dev/i2c-0, address 0x50, mode byte
Continue? [Y/n]
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 92 10 0b 02 02 11 00 09 03 52 01 08 0c 00 3c 00 ??????.??R???.<.
10: 6c 78 6b 30 6b 11 1f 8c d0 02 3c 3c 00 f0 03 0d lxk0k?????<<.???
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30: 00 00 00 00 00 00 00 00 00 00 00 00 0f 11 01 01 ............????
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70: 00 00 00 00 00 85 02 02 11 11 07 00 00 00 dc 3c .....??????...?<
80: 50 53 44 33 32 47 31 33 33 33 32 00 00 00 00 00 PSD32G13332.....
90: 00 00 00 00 00 00 02 31 34 30 30 31 30 30 30 33 ......?140010003
a0: 31 36 30 30 39 00 00 00 00 00 00 00 00 00 00 00 16009...........
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
� R < lxk0k ��<< �
� �<PSD32G13332 14001000316009 --
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