On Thu, Jul 28, 2011 at 5:44 AM, Hamo <[email protected]> wrote: > On Thu, Jul 28, 2011 at 7:00 PM, Patrick Georgi > <[email protected]> wrote: >> For static regions, we have IORESOURCE_FIXED. Look up that symbol in the >> coreboot code to see how it's used. >> >> You will need to determine a good place for where to define those, >> either per board (eg. mainboard.c) or per coreboot device driver >> (whereever these drivers belong to). >> > Thanks Patrick. Thanks for your quick reply. I tried your idea by > adding those resources to the PCI DOMAIN 0: > int idx = 1; > struct resource *iores; > iores = new_resource(dev, idx++); > iores->base = (resource_t)0x43000000; > iores->size = (resource_t)(16 << 20); > iores->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_ASSIGNED; > iores->limit = 0xffffffffUL; > > struct resource *memres1; > memres1 = new_resource(dev, idx++); > memres1->base = (resource_t)0x50000000; > memres1->size = (resource_t)(256 << 20); > memres1->flags = IORESOURCE_MEM | IORESOURCE_FIXED | > IORESOURCE_ASSIGNED; > memres1->limit = 0xffffffffUL; > > struct resource *memres2; > memres2 = new_resource(dev, idx++); > memres2->base = (resource_t)0x60000000; > memres2->size = (resource_t)(256 << 20); > memres2->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH | > IORESOURCE_FIXED | IORESOURCE_ASSIGNED; > memres2->limit = 0xffffffffUL; > > resources reading show this: > Show resources in subtree (Root Device)...After reading. > Root Device child on link 0 PCI_DOMAIN: 0000 > Root Device resource base 0 size 8000000 align 0 gran 0 limit 0 flags > e0004200 index 0 > PCI_DOMAIN: 0000 child on link 0 PCI: 00:0b.0 > PCI_DOMAIN: 0000 resource base 43000000 size 1000000 align 0 gran 0 > limit ffffffff flags c0000100 index 10000000 > PCI_DOMAIN: 0000 resource base 50000000 size 10000000 align 0 gran 0 > limit ffffffff flags c0000200 index 10000100 > PCI_DOMAIN: 0000 resource base 60000000 size 10000000 align 0 gran 0 > limit ffffffff flags c0001200 index 10000200 > PCI: 00:0b.0 > PCI: 00:0c.0 > PCI: 00:0c.0 resource base 0 size 100 align 8 gran 8 limit ffff > flags 100 index 10 > PCI: 00:0c.0 resource base 0 size 400 align 10 gran 10 limit > ffffffff flags 200 index 14 > PCI: 00:0c.0 resource base 0 size 2000 align 13 gran 13 limit > ffffffff flags 200 index 18 > > But after assigning, it shows: > Show resources in subtree (Root Device)...After assigning values. > Root Device child on link 0 PCI_DOMAIN: 0000 > Root Device resource base 0 size 8000000 align 0 gran 0 limit 0 flags > e0004200 index 0 > PCI_DOMAIN: 0000 child on link 0 PCI: 00:0b.0 > PCI_DOMAIN: 0000 resource base 43000000 size 1000000 align 0 gran 0 > limit ffffffff flags c0000100 index 10000000 > PCI_DOMAIN: 0000 resource base 50000000 size 10000000 align 0 gran 0 > limit ffffffff flags c0000200 index 10000100 > PCI_DOMAIN: 0000 resource base 60000000 size 10000000 align 0 gran 0 > limit ffffffff flags c0001200 index 10000200 > PCI: 00:0b.0 > PCI: 00:0c.0 > PCI: 00:0c.0 resource base 0 size 100 align 8 gran 8 limit ffff > flags 100 index 10 > PCI: 00:0c.0 resource base 0 size 400 align 10 gran 10 limit > ffffffff flags 200 index 14 > PCI: 00:0c.0 resource base 0 size 2000 align 13 gran 13 limit > ffffffff flags 200 index 18 > > I think I misunderstanding your idea. Could you please explain it in detail? >
IORESOURCE_IO? MMIO is memory. Are these devices on the PCI bus or on the root bus? I am not certain how the allocator handles root vs PCI, which is why I ask. For x86 the CPUs APIC area is reserved and not on the PCI bus. Marc -- http://se-eng.com -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
